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dt-bindings: display: add Unisoc's mipi dsi controller bindings
Adds MIPI DSI Controller support for Unisoc's display subsystem. v5: - Remove panel_in port for dsi node. Cc: Orson Zhai <orsonzhai@gmail.com> Cc: Chunyan Zhang <zhang.lyra@gmail.com> Signed-off-by: Kevin Tang <kevin.tang@unisoc.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211207142717.30296-6-kevin3.tang@gmail.com
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Dec 10, 2021
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Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/display/sprd/sprd,sharkl3-dsi-host.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: Unisoc MIPI DSI Controller | ||
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maintainers: | ||
- Kevin Tang <kevin.tang@unisoc.com> | ||
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properties: | ||
compatible: | ||
const: sprd,sharkl3-dsi-host | ||
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reg: | ||
maxItems: 1 | ||
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interrupts: | ||
maxItems: 2 | ||
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clocks: | ||
minItems: 1 | ||
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clock-names: | ||
items: | ||
- const: clk_src_96m | ||
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power-domains: | ||
maxItems: 1 | ||
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ports: | ||
type: object | ||
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properties: | ||
"#address-cells": | ||
const: 1 | ||
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"#size-cells": | ||
const: 0 | ||
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port@0: | ||
type: object | ||
description: | ||
A port node with endpoint definitions as defined in | ||
Documentation/devicetree/bindings/media/video-interfaces.txt. | ||
That port should be the input endpoint, usually coming from | ||
the associated DPU. | ||
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required: | ||
- "#address-cells" | ||
- "#size-cells" | ||
- port@0 | ||
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additionalProperties: false | ||
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required: | ||
- compatible | ||
- reg | ||
- interrupts | ||
- clocks | ||
- clock-names | ||
- ports | ||
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additionalProperties: false | ||
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examples: | ||
- | | ||
#include <dt-bindings/interrupt-controller/arm-gic.h> | ||
#include <dt-bindings/clock/sprd,sc9860-clk.h> | ||
dsi: dsi@63100000 { | ||
compatible = "sprd,sharkl3-dsi-host"; | ||
reg = <0x63100000 0x1000>; | ||
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; | ||
clock-names = "clk_src_96m"; | ||
clocks = <&pll CLK_TWPLL_96M>; | ||
ports { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
port@0 { | ||
reg = <0>; | ||
dsi_in: endpoint { | ||
remote-endpoint = <&dpu_out>; | ||
}; | ||
}; | ||
}; | ||
}; |