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Merge tag 'drm-xe-next-2024-10-10' of https://gitlab.freedesktop.org/…
…drm/xe/kernel into drm-next Cross-subsystem Changes: - Add drm_line_printer (Michal) Driver Changes: - Fix an UAF (Matt Auld) - Sanity check compression and coherency mode (Matt Auld) - Some PIC-ID work (Jani) - Use IS_ENABLED() instead of defined() on config options. - gt powergating work (Riana) - Suppress missing out ter rpm protection warning (Rodrigo) - Fix a vm leak (Dafna) - Clean up and update 'has_flat_ccs' handling (Lucas) - Fix arg to pci_iomap (Lucas) - Mark reserved engines in shapshot (Lucas) - Don't keep stale pointer (Michal) - Fix build warning with CONFIG_PM=n (Arnd) - Add a xe_bo subtest for shrinking / swapping (Thomas) - Add a warkaround (Tejas) - Some display PM work (Maarten) - Enable Xe2 + PES disaggregation (Ashutosh) - Large xe_mmio rework / cleanup (Matt Roper) - A couple of fixes / cleanups in the xe client code (Matt Auld) - Fix page-fault handling on closed VMs (Matt Brost) - Fix overflow in OA batch buffer (José) - Style fixes (Lucas, Jiapeng, Nitin) - Fixes and new development around SRIOV (Michal) - Use devm_add_action_or_reset() in gt code (He) - Fix CCS offset calculation (Matt Auld) - Remove i915_drv.h include (Rodrigo) - Restore PCI state on resume (Rodrigo) - Fix DSB buffer coherency / Revert DSB disabling (Maarten / Animesh) - Convert USM lock to rwsem (Matt Brost) - Defer gt-mmio intialization (Matt Roper) - meemirq changes (Ilia) - Move some PVC related code out of xe-for-CI and to the driver (Rodrigo / Jani) - Use a helper for ASID->VM lookup (Matt Brost) - Add new PCI id for ARL (Dnyaneshwar) - Use Xe2_LPM steering tables for Xe2_HPM (Gustavo) - Performance tuning work for media GT and L3 cache flushing (Gustavo) - Clean up VM- and exec queue file lock usage (Matt Brost) - GuC locking fix (Matt Auld) - Fix UAF around queue destruction (Matt Auld) - Move IRQ-related registers to dedicated header (Matt Roper) - Resume TDR after GT reset (Matt Brost) - Move xa_alloc to prevent UAF (Matt Auld) - Fix OA stream close (José) - Remove unused i915_gpu_error.h (Jani) - Prevent null pointer access in xe_migrate_copy (Zhanjun) - Fix memory leak when aborting binds (Matt Brost) - Prevent UAF in send_recv() (Matt Auld) - Fix xa_store() error checking (Matt Auld) - drop irq disabling around xa_erase in guc code (Matt Auld) - Use fault injection infrastructure to find issues as probe time (Francois) - Fix a workaround implementation. (Vinay) - Mark wedged_mode debugfs writable (Matt Roper) - Fix for prviewous memirq work (Michal) - More SRIOV work (Michal) - Devcoredump work (John) - GuC logging + devcoredump support (John) - Don't report L3 bank availability on PTL (Shekhar) - Replicate Xe2 PAT settings on Xe2 (Matt Roper) - Define Xe3 feature flags (Haridhar) - Reuse Xe2 MOCS table on on PTL (Haridhar) - Add PTL platform definition (Haridhar) - Add MCR steering for Xe3 (Matt) - More work around GuC capture for devcoredump (Zhanjun) - Improve cache flushing behaviour on bmg (Matt Auld) - Fix shrinker test compiler warnings on 32-bit (Thomas) - Initial set of workarounds for Xe3 (Gustavo) - Extend workaround for xe2lpg (Aradhya) - Fix unbalanced rpm put x 2 (Matt Auld) Signed-off-by: Dave Airlie <airlied@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQRskUM7w1oG5rx2IZO4FpNVCsYGvwUCZwekBwAKCRC4FpNVCsYG # v32oAQDnIKVwjZecI1V3oUsy2ZE3TKWx8HH4FweT6S5L6tqZwQD/b0vkeA3UaojO # 5FIkPEqyHFbrj+Sw7bLonLb3LHv4WAE= # =FtY6 # -----END PGP SIGNATURE----- # gpg: Signature made Thu 10 Oct 2024 19:53:11 AEST # gpg: using EDDSA key 6C91433BC35A06E6BC762193B81693550AC606BF # gpg: Can't check signature: No public key # Conflicts: # drivers/gpu/drm/xe/xe_gt_mcr.c # drivers/gpu/drm/xe/xe_tuning.c From: Thomas Hellstrom <thomas.hellstrom@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/Zwekwrak12c5SSgo@fedora
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
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| /* SPDX-License-Identifier: MIT */ | ||
| /* | ||
| * Copyright © 2024 Intel Corporation | ||
| */ | ||
|
|
||
| #ifndef _ABI_GUC_CAPTURE_ABI_H | ||
| #define _ABI_GUC_CAPTURE_ABI_H | ||
|
|
||
| #include <linux/types.h> | ||
|
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| /* Capture List Index */ | ||
| enum guc_capture_list_index_type { | ||
| GUC_CAPTURE_LIST_INDEX_PF = 0, | ||
| GUC_CAPTURE_LIST_INDEX_VF = 1, | ||
| }; | ||
|
|
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| #define GUC_CAPTURE_LIST_INDEX_MAX (GUC_CAPTURE_LIST_INDEX_VF + 1) | ||
|
|
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| /* Register-types of GuC capture register lists */ | ||
| enum guc_state_capture_type { | ||
| GUC_STATE_CAPTURE_TYPE_GLOBAL = 0, | ||
| GUC_STATE_CAPTURE_TYPE_ENGINE_CLASS, | ||
| GUC_STATE_CAPTURE_TYPE_ENGINE_INSTANCE | ||
| }; | ||
|
|
||
| #define GUC_STATE_CAPTURE_TYPE_MAX (GUC_STATE_CAPTURE_TYPE_ENGINE_INSTANCE + 1) | ||
|
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| /* Class indecies for capture_class and capture_instance arrays */ | ||
| enum guc_capture_list_class_type { | ||
| GUC_CAPTURE_LIST_CLASS_RENDER_COMPUTE = 0, | ||
| GUC_CAPTURE_LIST_CLASS_VIDEO = 1, | ||
| GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE = 2, | ||
| GUC_CAPTURE_LIST_CLASS_BLITTER = 3, | ||
| GUC_CAPTURE_LIST_CLASS_GSC_OTHER = 4, | ||
| }; | ||
|
|
||
| #define GUC_CAPTURE_LIST_CLASS_MAX (GUC_CAPTURE_LIST_CLASS_GSC_OTHER + 1) | ||
|
|
||
| /** | ||
| * struct guc_mmio_reg - GuC MMIO reg state struct | ||
| * | ||
| * GuC MMIO reg state struct | ||
| */ | ||
| struct guc_mmio_reg { | ||
| /** @offset: MMIO Offset - filled in by Host */ | ||
| u32 offset; | ||
| /** @value: MMIO Value - Used by Firmware to store value */ | ||
| u32 value; | ||
| /** @flags: Flags for accessing the MMIO */ | ||
| u32 flags; | ||
| /** @mask: Value of a mask to apply if mask with value is set */ | ||
| u32 mask; | ||
| #define GUC_REGSET_MASKED BIT(0) | ||
| #define GUC_REGSET_STEERING_NEEDED BIT(1) | ||
| #define GUC_REGSET_MASKED_WITH_VALUE BIT(2) | ||
| #define GUC_REGSET_RESTORE_ONLY BIT(3) | ||
| #define GUC_REGSET_STEERING_GROUP GENMASK(16, 12) | ||
| #define GUC_REGSET_STEERING_INSTANCE GENMASK(23, 20) | ||
| } __packed; | ||
|
|
||
| /** | ||
| * struct guc_mmio_reg_set - GuC register sets | ||
| * | ||
| * GuC register sets | ||
| */ | ||
| struct guc_mmio_reg_set { | ||
| /** @address: register address */ | ||
| u32 address; | ||
| /** @count: register count */ | ||
| u16 count; | ||
| /** @reserved: reserved */ | ||
| u16 reserved; | ||
| } __packed; | ||
|
|
||
| /** | ||
| * struct guc_debug_capture_list_header - Debug capture list header. | ||
| * | ||
| * Debug capture list header. | ||
| */ | ||
| struct guc_debug_capture_list_header { | ||
| /** @info: contains number of MMIO descriptors in the capture list. */ | ||
| u32 info; | ||
| #define GUC_CAPTURELISTHDR_NUMDESCR GENMASK(15, 0) | ||
| } __packed; | ||
|
|
||
| /** | ||
| * struct guc_debug_capture_list - Debug capture list | ||
| * | ||
| * As part of ADS registration, these header structures (followed by | ||
| * an array of 'struct guc_mmio_reg' entries) are used to register with | ||
| * GuC microkernel the list of registers we want it to dump out prior | ||
| * to a engine reset. | ||
| */ | ||
| struct guc_debug_capture_list { | ||
| /** @header: Debug capture list header. */ | ||
| struct guc_debug_capture_list_header header; | ||
| /** @regs: MMIO descriptors in the capture list. */ | ||
| struct guc_mmio_reg regs[]; | ||
| } __packed; | ||
|
|
||
| /** | ||
| * struct guc_state_capture_header_t - State capture header. | ||
| * | ||
| * Prior to resetting engines that have hung or faulted, GuC microkernel | ||
| * reports the engine error-state (register values that was read) by | ||
| * logging them into the shared GuC log buffer using these hierarchy | ||
| * of structures. | ||
| */ | ||
| struct guc_state_capture_header_t { | ||
| /** | ||
| * @owner: VFID | ||
| * BR[ 7: 0] MBZ when SRIOV is disabled. When SRIOV is enabled | ||
| * VFID is an integer in range [0, 63] where 0 means the state capture | ||
| * is corresponding to the PF and an integer N in range [1, 63] means | ||
| * the state capture is for VF N. | ||
| */ | ||
| u32 owner; | ||
| #define GUC_STATE_CAPTURE_HEADER_VFID GENMASK(7, 0) | ||
| /** @info: Engine class/instance and capture type info */ | ||
| u32 info; | ||
| #define GUC_STATE_CAPTURE_HEADER_CAPTURE_TYPE GENMASK(3, 0) /* see guc_state_capture_type */ | ||
| #define GUC_STATE_CAPTURE_HEADER_ENGINE_CLASS GENMASK(7, 4) /* see guc_capture_list_class_type */ | ||
| #define GUC_STATE_CAPTURE_HEADER_ENGINE_INSTANCE GENMASK(11, 8) | ||
| /** | ||
| * @lrca: logical ring context address. | ||
| * if type-instance, LRCA (address) that hung, else set to ~0 | ||
| */ | ||
| u32 lrca; | ||
| /** | ||
| * @guc_id: context_index. | ||
| * if type-instance, context index of hung context, else set to ~0 | ||
| */ | ||
| u32 guc_id; | ||
| /** @num_mmio_entries: Number of captured MMIO entries. */ | ||
| u32 num_mmio_entries; | ||
| #define GUC_STATE_CAPTURE_HEADER_NUM_MMIO_ENTRIES GENMASK(9, 0) | ||
| } __packed; | ||
|
|
||
| /** | ||
| * struct guc_state_capture_t - State capture. | ||
| * | ||
| * State capture | ||
| */ | ||
| struct guc_state_capture_t { | ||
| /** @header: State capture header. */ | ||
| struct guc_state_capture_header_t header; | ||
| /** @mmio_entries: Array of captured guc_mmio_reg entries. */ | ||
| struct guc_mmio_reg mmio_entries[]; | ||
| } __packed; | ||
|
|
||
| /* State Capture Group Type */ | ||
| enum guc_state_capture_group_type { | ||
| GUC_STATE_CAPTURE_GROUP_TYPE_FULL = 0, | ||
| GUC_STATE_CAPTURE_GROUP_TYPE_PARTIAL | ||
| }; | ||
|
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||
| #define GUC_STATE_CAPTURE_GROUP_TYPE_MAX (GUC_STATE_CAPTURE_GROUP_TYPE_PARTIAL + 1) | ||
|
|
||
| /** | ||
| * struct guc_state_capture_group_header_t - State capture group header | ||
| * | ||
| * State capture group header. | ||
| */ | ||
| struct guc_state_capture_group_header_t { | ||
| /** @owner: VFID */ | ||
| u32 owner; | ||
| #define GUC_STATE_CAPTURE_GROUP_HEADER_VFID GENMASK(7, 0) | ||
| /** @info: Engine class/instance and capture type info */ | ||
| u32 info; | ||
| #define GUC_STATE_CAPTURE_GROUP_HEADER_NUM_CAPTURES GENMASK(7, 0) | ||
| #define GUC_STATE_CAPTURE_GROUP_HEADER_CAPTURE_GROUP_TYPE GENMASK(15, 8) | ||
| } __packed; | ||
|
|
||
| /** | ||
| * struct guc_state_capture_group_t - State capture group. | ||
| * | ||
| * this is the top level structure where an error-capture dump starts | ||
| */ | ||
| struct guc_state_capture_group_t { | ||
| /** @grp_header: State capture group header. */ | ||
| struct guc_state_capture_group_header_t grp_header; | ||
| /** @capture_entries: Array of state captures */ | ||
| struct guc_state_capture_t capture_entries[]; | ||
| } __packed; | ||
|
|
||
| #endif |
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