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Merge tag 'ib-mfd-net-pinctrl-v6.0' of git://git.kernel.org/pub/scm/l…
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Lee Jones says:

====================
Immutable branch between MFD, Net and Pinctrl due for the v6.0 merge window

* tag 'ib-mfd-net-pinctrl-v6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd:
  mfd: ocelot: Add support for the vsc7512 chip via spi
  dt-bindings: mfd: ocelot: Add bindings for VSC7512
  resource: add define macro for register address resources
  pinctrl: microchip-sgpio: add ability to be used in a non-mmio configuration
  pinctrl: microchip-sgpio: allow sgpio driver to be used as a module
  pinctrl: ocelot: add ability to be used in a non-mmio configuration
  net: mdio: mscc-miim: add ability to be used in a non-mmio configuration
  mfd: ocelot: Add helper to get regmap from a resource
====================

Link: https://lore.kernel.org/r/YxrjyHcceLOFlT/c@google.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Jakub Kicinski committed Sep 19, 2022
2 parents 2f8a786 + f3e8936 commit 2bd178c
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160 changes: 160 additions & 0 deletions Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml
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# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/mscc,ocelot.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Ocelot Externally-Controlled Ethernet Switch

maintainers:
- Colin Foster <colin.foster@in-advantage.com>

description: |
The Ocelot ethernet switch family contains chips that have an internal CPU
(VSC7513, VSC7514) and chips that don't (VSC7511, VSC7512). All switches have
the option to be controlled externally, which is the purpose of this driver.
The switch family is a multi-port networking switch that supports many
interfaces. Additionally, the device can perform pin control, MDIO buses, and
external GPIO expanders.
properties:
compatible:
enum:
- mscc,vsc7512

reg:
maxItems: 1

"#address-cells":
const: 1

"#size-cells":
const: 1

spi-max-frequency:
maxItems: 1

patternProperties:
"^pinctrl@[0-9a-f]+$":
type: object
$ref: /schemas/pinctrl/mscc,ocelot-pinctrl.yaml

"^gpio@[0-9a-f]+$":
type: object
$ref: /schemas/pinctrl/microchip,sparx5-sgpio.yaml
properties:
compatible:
enum:
- mscc,ocelot-sgpio

"^mdio@[0-9a-f]+$":
type: object
$ref: /schemas/net/mscc,miim.yaml
properties:
compatible:
enum:
- mscc,ocelot-miim

required:
- compatible
- reg
- '#address-cells'
- '#size-cells'
- spi-max-frequency

additionalProperties: false

examples:
- |
ocelot_clock: ocelot-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
};
spi {
#address-cells = <1>;
#size-cells = <0>;
soc@0 {
compatible = "mscc,vsc7512";
spi-max-frequency = <2500000>;
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
mdio@7107009c {
compatible = "mscc,ocelot-miim";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x7107009c 0x24>;
sw_phy0: ethernet-phy@0 {
reg = <0x0>;
};
};
mdio@710700c0 {
compatible = "mscc,ocelot-miim";
pinctrl-names = "default";
pinctrl-0 = <&miim1_pins>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x710700c0 0x24>;
sw_phy4: ethernet-phy@4 {
reg = <0x4>;
};
};
gpio: pinctrl@71070034 {
compatible = "mscc,ocelot-pinctrl";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&gpio 0 0 22>;
reg = <0x71070034 0x6c>;
sgpio_pins: sgpio-pins {
pins = "GPIO_0", "GPIO_1", "GPIO_2", "GPIO_3";
function = "sg0";
};
miim1_pins: miim1-pins {
pins = "GPIO_14", "GPIO_15";
function = "miim";
};
};
gpio@710700f8 {
compatible = "mscc,ocelot-sgpio";
#address-cells = <1>;
#size-cells = <0>;
bus-frequency = <12500000>;
clocks = <&ocelot_clock>;
microchip,sgpio-port-ranges = <0 15>;
pinctrl-names = "default";
pinctrl-0 = <&sgpio_pins>;
reg = <0x710700f8 0x100>;
sgpio_in0: gpio@0 {
compatible = "microchip,sparx5-sgpio-bank";
reg = <0>;
gpio-controller;
#gpio-cells = <3>;
ngpios = <64>;
};
sgpio_out1: gpio@1 {
compatible = "microchip,sparx5-sgpio-bank";
reg = <1>;
gpio-controller;
#gpio-cells = <3>;
ngpios = <64>;
};
};
};
};
...

7 changes: 7 additions & 0 deletions MAINTAINERS
Original file line number Diff line number Diff line change
Expand Up @@ -14746,6 +14746,13 @@ F: net/dsa/tag_ocelot.c
F: net/dsa/tag_ocelot_8021q.c
F: tools/testing/selftests/drivers/net/ocelot/*

OCELOT EXTERNAL SWITCH CONTROL
M: Colin Foster <colin.foster@in-advantage.com>
S: Supported
F: Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml
F: drivers/mfd/ocelot*
F: include/linux/mfd/ocelot.h

OCXL (Open Coherent Accelerator Processor Interface OpenCAPI) DRIVER
M: Frederic Barrat <fbarrat@linux.ibm.com>
M: Andrew Donnellan <ajd@linux.ibm.com>
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21 changes: 21 additions & 0 deletions drivers/mfd/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -963,6 +963,27 @@ config MFD_MENF21BMC
This driver can also be built as a module. If so the module
will be called menf21bmc.

config MFD_OCELOT
tristate "Microsemi Ocelot External Control Support"
depends on SPI_MASTER
select MFD_CORE
select REGMAP_SPI
help
Ocelot is a family of networking chips that support multiple ethernet
and fibre interfaces. In addition to networking, they contain several
other functions, including pinctrl, MDIO, and communication with
external chips. While some chips have an internal processor capable of
running an OS, others don't. All chips can be controlled externally
through different interfaces, including SPI, I2C, and PCIe.

Say yes here to add support for Ocelot chips (VSC7511, VSC7512,
VSC7513, VSC7514) controlled externally.

To compile this driver as a module, choose M here: the module will be
called ocelot-soc.

If unsure, say N.

config EZX_PCAP
bool "Motorola EZXPCAP Support"
depends on SPI_MASTER
Expand Down
3 changes: 3 additions & 0 deletions drivers/mfd/Makefile
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Expand Up @@ -120,6 +120,9 @@ obj-$(CONFIG_MFD_MC13XXX_I2C) += mc13xxx-i2c.o

obj-$(CONFIG_MFD_CORE) += mfd-core.o

ocelot-soc-objs := ocelot-core.o ocelot-spi.o
obj-$(CONFIG_MFD_OCELOT) += ocelot-soc.o

obj-$(CONFIG_EZX_PCAP) += ezx-pcap.o
obj-$(CONFIG_MFD_CPCAP) += motorola-cpcap.o

Expand Down
161 changes: 161 additions & 0 deletions drivers/mfd/ocelot-core.c
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Core driver for the Ocelot chip family.
*
* The VSC7511, 7512, 7513, and 7514 can be controlled internally via an
* on-chip MIPS processor, or externally via SPI, I2C, PCIe. This core driver is
* intended to be the bus-agnostic glue between, for example, the SPI bus and
* the child devices.
*
* Copyright 2021-2022 Innovative Advantage Inc.
*
* Author: Colin Foster <colin.foster@in-advantage.com>
*/

#include <linux/bits.h>
#include <linux/device.h>
#include <linux/export.h>
#include <linux/iopoll.h>
#include <linux/ioport.h>
#include <linux/kernel.h>
#include <linux/mfd/core.h>
#include <linux/mfd/ocelot.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/types.h>

#include <soc/mscc/ocelot.h>

#include "ocelot.h"

#define REG_GCB_SOFT_RST 0x0008

#define BIT_SOFT_CHIP_RST BIT(0)

#define VSC7512_MIIM0_RES_START 0x7107009c
#define VSC7512_MIIM1_RES_START 0x710700c0
#define VSC7512_MIIM_RES_SIZE 0x024

#define VSC7512_PHY_RES_START 0x710700f0
#define VSC7512_PHY_RES_SIZE 0x004

#define VSC7512_GPIO_RES_START 0x71070034
#define VSC7512_GPIO_RES_SIZE 0x06c

#define VSC7512_SIO_CTRL_RES_START 0x710700f8
#define VSC7512_SIO_CTRL_RES_SIZE 0x100

#define VSC7512_GCB_RST_SLEEP_US 100
#define VSC7512_GCB_RST_TIMEOUT_US 100000

static int ocelot_gcb_chip_rst_status(struct ocelot_ddata *ddata)
{
int val, err;

err = regmap_read(ddata->gcb_regmap, REG_GCB_SOFT_RST, &val);
if (err)
return err;

return val;
}

int ocelot_chip_reset(struct device *dev)
{
struct ocelot_ddata *ddata = dev_get_drvdata(dev);
int ret, val;

/*
* Reset the entire chip here to put it into a completely known state.
* Other drivers may want to reset their own subsystems. The register
* self-clears, so one write is all that is needed and wait for it to
* clear.
*/
ret = regmap_write(ddata->gcb_regmap, REG_GCB_SOFT_RST, BIT_SOFT_CHIP_RST);
if (ret)
return ret;

return readx_poll_timeout(ocelot_gcb_chip_rst_status, ddata, val, !val,
VSC7512_GCB_RST_SLEEP_US, VSC7512_GCB_RST_TIMEOUT_US);
}
EXPORT_SYMBOL_NS(ocelot_chip_reset, MFD_OCELOT);

static const struct resource vsc7512_miim0_resources[] = {
DEFINE_RES_REG_NAMED(VSC7512_MIIM0_RES_START, VSC7512_MIIM_RES_SIZE, "gcb_miim0"),
DEFINE_RES_REG_NAMED(VSC7512_PHY_RES_START, VSC7512_PHY_RES_SIZE, "gcb_phy"),
};

static const struct resource vsc7512_miim1_resources[] = {
DEFINE_RES_REG_NAMED(VSC7512_MIIM1_RES_START, VSC7512_MIIM_RES_SIZE, "gcb_miim1"),
};

static const struct resource vsc7512_pinctrl_resources[] = {
DEFINE_RES_REG_NAMED(VSC7512_GPIO_RES_START, VSC7512_GPIO_RES_SIZE, "gcb_gpio"),
};

static const struct resource vsc7512_sgpio_resources[] = {
DEFINE_RES_REG_NAMED(VSC7512_SIO_CTRL_RES_START, VSC7512_SIO_CTRL_RES_SIZE, "gcb_sio"),
};

static const struct mfd_cell vsc7512_devs[] = {
{
.name = "ocelot-pinctrl",
.of_compatible = "mscc,ocelot-pinctrl",
.num_resources = ARRAY_SIZE(vsc7512_pinctrl_resources),
.resources = vsc7512_pinctrl_resources,
}, {
.name = "ocelot-sgpio",
.of_compatible = "mscc,ocelot-sgpio",
.num_resources = ARRAY_SIZE(vsc7512_sgpio_resources),
.resources = vsc7512_sgpio_resources,
}, {
.name = "ocelot-miim0",
.of_compatible = "mscc,ocelot-miim",
.of_reg = VSC7512_MIIM0_RES_START,
.use_of_reg = true,
.num_resources = ARRAY_SIZE(vsc7512_miim0_resources),
.resources = vsc7512_miim0_resources,
}, {
.name = "ocelot-miim1",
.of_compatible = "mscc,ocelot-miim",
.of_reg = VSC7512_MIIM1_RES_START,
.use_of_reg = true,
.num_resources = ARRAY_SIZE(vsc7512_miim1_resources),
.resources = vsc7512_miim1_resources,
},
};

static void ocelot_core_try_add_regmap(struct device *dev,
const struct resource *res)
{
if (dev_get_regmap(dev, res->name))
return;

ocelot_spi_init_regmap(dev, res);
}

static void ocelot_core_try_add_regmaps(struct device *dev,
const struct mfd_cell *cell)
{
int i;

for (i = 0; i < cell->num_resources; i++)
ocelot_core_try_add_regmap(dev, &cell->resources[i]);
}

int ocelot_core_init(struct device *dev)
{
int i, ndevs;

ndevs = ARRAY_SIZE(vsc7512_devs);

for (i = 0; i < ndevs; i++)
ocelot_core_try_add_regmaps(dev, &vsc7512_devs[i]);

return devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, vsc7512_devs, ndevs, NULL, 0, NULL);
}
EXPORT_SYMBOL_NS(ocelot_core_init, MFD_OCELOT);

MODULE_DESCRIPTION("Externally Controlled Ocelot Chip Driver");
MODULE_AUTHOR("Colin Foster <colin.foster@in-advantage.com>");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(MFD_OCELOT_SPI);
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