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drivers: net: ethernet: cpsw: Add device tree support to CPSW
This patch adds device tree support for cpsw driver Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Mugunthan V N
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David S. Miller
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Aug 4, 2012
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TI SoC Ethernet Switch Controller Device Tree Bindings | ||
------------------------------------------------------ | ||
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Required properties: | ||
- compatible : Should be "ti,cpsw" | ||
- reg : physical base address and size of the cpsw | ||
registers map | ||
- interrupts : property with a value describing the interrupt | ||
number | ||
- interrupt-parent : The parent interrupt controller | ||
- cpdma_channels : Specifies number of channels in CPDMA | ||
- host_port_no : Specifies host port shift | ||
- cpdma_reg_ofs : Specifies CPDMA submodule register offset | ||
- ale_reg_ofs : Specifies ALE submodule register offset | ||
- ale_entries : Specifies No of entries ALE can hold | ||
- host_port_reg_ofs : Specifies host port register offset | ||
- hw_stats_reg_ofs : Specifies hardware statistics register offset | ||
- bd_ram_ofs : Specifies internal desciptor RAM offset | ||
- bd_ram_size : Specifies internal descriptor RAM size | ||
- rx_descs : Specifies number of Rx descriptors | ||
- mac_control : Specifies Default MAC control register content | ||
for the specific platform | ||
- slaves : Specifies number for slaves | ||
- slave_reg_ofs : Specifies slave register offset | ||
- sliver_reg_ofs : Specifies slave sliver register offset | ||
- phy_id : Specifies slave phy id | ||
- mac-address : Specifies slave MAC address | ||
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Optional properties: | ||
- ti,hwmods : Must be "cpgmac0" | ||
- no_bd_ram : Must be 0 or 1 | ||
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Note: "ti,hwmods" field is used to fetch the base address and irq | ||
resources from TI, omap hwmod data base during device registration. | ||
Future plan is to migrate hwmod data base contents into device tree | ||
blob so that, all the required data will be used from device tree dts | ||
file. | ||
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Examples: | ||
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mac: ethernet@4A100000 { | ||
compatible = "ti,cpsw"; | ||
reg = <0x4A100000 0x1000>; | ||
interrupts = <55 0x4>; | ||
interrupt-parent = <&intc>; | ||
cpdma_channels = 8; | ||
host_port_no = 0; | ||
cpdma_reg_ofs = 0x800; | ||
ale_reg_ofs = 0xd00; | ||
ale_entries = 1024; | ||
host_port_reg_ofs = 0x108; | ||
hw_stats_reg_ofs = 0x900; | ||
bd_ram_ofs = 0x2000; | ||
bd_ram_size = 0x2000; | ||
no_bd_ram = 0; | ||
rx_descs = 64; | ||
mac_control = 0x20; | ||
slaves = 2; | ||
slave@0 { | ||
slave_reg_ofs = 0x208; | ||
sliver_reg_ofs = 0xd80; | ||
phy_id = "davinci_mdio-0:00" | ||
mac-address = [00 04 9F 01 1B B8]; | ||
}; | ||
slave@1 { | ||
slave_reg_ofs = 0x208; | ||
sliver_reg_ofs = 0xd80; | ||
phy_id = "davinci_mdio-0:01" | ||
mac-address = [00 04 9F 01 1B B9]; | ||
}; | ||
}; | ||
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(or) | ||
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mac: ethernet@4A100000 { | ||
compatible = "ti,cpsw"; | ||
ti,hwmods = "cpgmac0"; | ||
cpdma_channels = 8; | ||
host_port_no = 0; | ||
cpdma_reg_ofs = 0x800; | ||
ale_reg_ofs = 0xd00; | ||
ale_entries = 1024; | ||
host_port_reg_ofs = 0x108; | ||
hw_stats_reg_ofs = 0x900; | ||
bd_ram_ofs = 0x2000; | ||
bd_ram_size = 0x2000; | ||
no_bd_ram = 0; | ||
rx_descs = 64; | ||
mac_control = 0x20; | ||
slaves = 2; | ||
slave@0 { | ||
slave_reg_ofs = 0x208; | ||
sliver_reg_ofs = 0xd80; | ||
phy_id = "davinci_mdio-0:00" | ||
mac-address = [00 04 9F 01 1B B8]; | ||
}; | ||
slave@1 { | ||
slave_reg_ofs = 0x208; | ||
sliver_reg_ofs = 0xd80; | ||
phy_id = "davinci_mdio-0:01" | ||
mac-address = [00 04 9F 01 1B B9]; | ||
}; | ||
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}; |
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