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arm64/sysreg: Enforce whole word match for open/close tokens
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Opening and closing tokens can also match on words with common prefixes
like "Endsysreg" vs "EndsysregFields". This could potentially make the
script go wrong in weird ways so make it fall through to the fatal
unhandled statement catcher if it doesn't fully match the current
block.

Closing ones also get expect_fields(1) to ensure nothing other than
whitespace follows.

Signed-off-by: James Clark <james.clark@linaro.org>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20250115162600.2153226-3-james.clark@linaro.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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James Clark authored and Catalin Marinas committed Mar 14, 2025
1 parent 00cb1e0 commit 2fdbf2f
Showing 1 changed file with 17 additions and 14 deletions.
31 changes: 17 additions & 14 deletions arch/arm64/tools/gen-sysreg.awk
View file
Original file line number Diff line number Diff line change
Expand Up @@ -111,7 +111,7 @@ END {
/^$/ { next }
/^[\t ]*#/ { next }

/^SysregFields/ && block_current() == "Root" {
$1 == "SysregFields" && block_current() == "Root" {
block_push("SysregFields")

expect_fields(2)
Expand All @@ -127,7 +127,8 @@ END {
next
}

/^EndSysregFields/ && block_current() == "SysregFields" {
$1 == "EndSysregFields" && block_current() == "SysregFields" {
expect_fields(1)
if (next_bit > 0)
fatal("Unspecified bits in " reg)

Expand All @@ -145,7 +146,7 @@ END {
next
}

/^Sysreg/ && block_current() == "Root" {
$1 == "Sysreg" && block_current() == "Root" {
block_push("Sysreg")

expect_fields(7)
Expand Down Expand Up @@ -177,7 +178,8 @@ END {
next
}

/^EndSysreg/ && block_current() == "Sysreg" {
$1 == "EndSysreg" && block_current() == "Sysreg" {
expect_fields(1)
if (next_bit > 0)
fatal("Unspecified bits in " reg)

Expand Down Expand Up @@ -206,7 +208,7 @@ END {

# Currently this is effectivey a comment, in future we may want to emit
# defines for the fields.
(/^Fields/ || /^Mapping/) && block_current() == "Sysreg" {
($1 == "Fields" || $1 == "Mapping") && block_current() == "Sysreg" {
expect_fields(2)

if (next_bit != 63)
Expand All @@ -224,7 +226,7 @@ END {
}


/^Res0/ && (block_current() == "Sysreg" || block_current() == "SysregFields") {
$1 == "Res0" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
expect_fields(2)
parse_bitdef(reg, "RES0", $2)
field = "RES0_" msb "_" lsb
Expand All @@ -234,7 +236,7 @@ END {
next
}

/^Res1/ && (block_current() == "Sysreg" || block_current() == "SysregFields") {
$1 == "Res1" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
expect_fields(2)
parse_bitdef(reg, "RES1", $2)
field = "RES1_" msb "_" lsb
Expand All @@ -244,7 +246,7 @@ END {
next
}

/^Unkn/ && (block_current() == "Sysreg" || block_current() == "SysregFields") {
$1 == "Unkn" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
expect_fields(2)
parse_bitdef(reg, "UNKN", $2)
field = "UNKN_" msb "_" lsb
Expand All @@ -254,7 +256,7 @@ END {
next
}

/^Field/ && (block_current() == "Sysreg" || block_current() == "SysregFields") {
$1 == "Field" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
expect_fields(3)
field = $3
parse_bitdef(reg, field, $2)
Expand All @@ -265,14 +267,14 @@ END {
next
}

/^Raz/ && (block_current() == "Sysreg" || block_current() == "SysregFields") {
$1 == "Raz" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
expect_fields(2)
parse_bitdef(reg, field, $2)

next
}

/^SignedEnum/ && (block_current() == "Sysreg" || block_current() == "SysregFields") {
$1 == "SignedEnum" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
block_push("Enum")

expect_fields(3)
Expand All @@ -285,7 +287,7 @@ END {
next
}

/^UnsignedEnum/ && (block_current() == "Sysreg" || block_current() == "SysregFields") {
$1 == "UnsignedEnum" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
block_push("Enum")

expect_fields(3)
Expand All @@ -298,7 +300,7 @@ END {
next
}

/^Enum/ && (block_current() == "Sysreg" || block_current() == "SysregFields") {
$1 == "Enum" && (block_current() == "Sysreg" || block_current() == "SysregFields") {
block_push("Enum")

expect_fields(3)
Expand All @@ -310,7 +312,8 @@ END {
next
}

/^EndEnum/ && block_current() == "Enum" {
$1 == "EndEnum" && block_current() == "Enum" {
expect_fields(1)

field = null
msb = null
Expand Down

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