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Merge tag 'media/v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel…
…/git/mchehab/linux-media Pull media updates from Mauro Carvalho Chehab: - new i2c drivers: ds90ub913, ds90ub953, ds90ub960, dw9719, ds90ub913 - new Intel IVSC MEI drivers - some Mediatek platform drivers were moved to a common location - Intel atomisp2 driver is now working with the main ov2680 driver. Due to that, the atomisp2 ov2680 staging one was removed - the bttv driver was finally converted to videobuf2 framework. This was the last one upstream using videobuf version 1 core. We'll likely remove the old videobuf framework on 6.7 - lots of improvements at atomisp driver: it now works with normal I2C sensors. Several compile-mode dependecies to select between ISP2400 and ISP2401 are now solved in runtime - a new ipu-bridge logic was added to work with IVSC MEI drivers - venus driver gained better support for new VPU versions - the v4l core async framework has gained lots of improvements and cleanups - lots of other cleanups, improvements and driver fixes * tag 'media/v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (358 commits) media: ivsc: Add ACPI dependency media: bttv: convert to vb2 media: bttv: use audio defaults for winfast2000 media: bttv: refactor bttv_set_dma() media: bttv: move vbi_skip/vbi_count out of buffer media: bttv: remove crop info from bttv_buffer media: bttv: remove tvnorm field from bttv_buffer media: bttv: remove format field from bttv_buffer media: bttv: move do_crop flag out of bttv_fh media: bttv: copy vbi_fmt from bttv_fh media: bttv: copy vid fmt/width/height from fh media: bttv: radio use v4l2_fh instead of bttv_fh media: bttv: replace BUG with WARN_ON media: bttv: use video_drvdata to get bttv media: i2c: rdacm21: Fix uninitialized value media: coda: Remove duplicated include media: vivid: fix the racy dev->radio_tx_rds_owner media: i2c: ccs: Check rules is non-NULL media: i2c: ds90ub960: Fix PLL config for 1200 MHz CSI rate media: i2c: ds90ub953: Fix use of uninitialized variables ...
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| # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | ||
| %YAML 1.2 | ||
| --- | ||
| $id: http://devicetree.org/schemas/i2c/i2c-atr.yaml# | ||
| $schema: http://devicetree.org/meta-schemas/core.yaml# | ||
|
|
||
| title: Common i2c address translator properties | ||
|
|
||
| maintainers: | ||
| - Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> | ||
|
|
||
| description: | ||
| An I2C Address Translator (ATR) is a device with an I2C slave parent | ||
| ("upstream") port and N I2C master child ("downstream") ports, and | ||
| forwards transactions from upstream to the appropriate downstream port | ||
| with a modified slave address. The address used on the parent bus is | ||
| called the "alias" and is (potentially) different from the physical | ||
| slave address of the child bus. Address translation is done by the | ||
| hardware. | ||
|
|
||
| properties: | ||
| i2c-alias-pool: | ||
| $ref: /schemas/types.yaml#/definitions/uint32-array | ||
| description: | ||
| I2C alias pool is a pool of I2C addresses on the main I2C bus that can be | ||
| used to access the remote peripherals on the serializer's I2C bus. The | ||
| addresses must be available, not used by any other peripheral. Each | ||
| remote peripheral is assigned an alias from the pool, and transactions to | ||
| that address will be forwarded to the remote peripheral, with the address | ||
| translated to the remote peripheral's real address. This property is not | ||
| needed if there are no I2C addressable remote peripherals. | ||
|
|
||
| additionalProperties: true | ||
| ... |
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Documentation/devicetree/bindings/media/cdns,csi2rx.txt
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Documentation/devicetree/bindings/media/cdns,csi2rx.yaml
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| # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | ||
| %YAML 1.2 | ||
| --- | ||
| $id: http://devicetree.org/schemas/media/cdns,csi2rx.yaml# | ||
| $schema: http://devicetree.org/meta-schemas/core.yaml# | ||
|
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||
| title: Cadence MIPI-CSI2 RX controller | ||
|
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||
| maintainers: | ||
| - Maxime Ripard <mripard@kernel.org> | ||
|
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||
| description: | ||
| The Cadence MIPI-CSI2 RX controller is a CSI-2 bridge supporting up to 4 CSI | ||
| lanes in input, and 4 different pixel streams in output. | ||
|
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| properties: | ||
| compatible: | ||
| items: | ||
| - enum: | ||
| - starfive,jh7110-csi2rx | ||
| - const: cdns,csi2rx | ||
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| reg: | ||
| maxItems: 1 | ||
|
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| clocks: | ||
| items: | ||
| - description: CSI2Rx system clock | ||
| - description: Gated Register bank clock for APB interface | ||
| - description: pixel Clock for Stream interface 0 | ||
| - description: pixel Clock for Stream interface 1 | ||
| - description: pixel Clock for Stream interface 2 | ||
| - description: pixel Clock for Stream interface 3 | ||
|
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||
| clock-names: | ||
| items: | ||
| - const: sys_clk | ||
| - const: p_clk | ||
| - const: pixel_if0_clk | ||
| - const: pixel_if1_clk | ||
| - const: pixel_if2_clk | ||
| - const: pixel_if3_clk | ||
|
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||
| resets: | ||
| items: | ||
| - description: CSI2Rx system reset | ||
| - description: Gated Register bank reset for APB interface | ||
| - description: pixel reset for Stream interface 0 | ||
| - description: pixel reset for Stream interface 1 | ||
| - description: pixel reset for Stream interface 2 | ||
| - description: pixel reset for Stream interface 3 | ||
|
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||
| reset-names: | ||
| items: | ||
| - const: sys | ||
| - const: reg_bank | ||
| - const: pixel_if0 | ||
| - const: pixel_if1 | ||
| - const: pixel_if2 | ||
| - const: pixel_if3 | ||
|
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| phys: | ||
| maxItems: 1 | ||
| description: MIPI D-PHY | ||
|
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| phy-names: | ||
| items: | ||
| - const: dphy | ||
|
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| ports: | ||
| $ref: /schemas/graph.yaml#/properties/ports | ||
|
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| properties: | ||
| port@0: | ||
| $ref: /schemas/graph.yaml#/$defs/port-base | ||
| unevaluatedProperties: false | ||
| description: | ||
| Input port node, single endpoint describing the CSI-2 transmitter. | ||
|
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||
| properties: | ||
| endpoint: | ||
| $ref: video-interfaces.yaml# | ||
| unevaluatedProperties: false | ||
|
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| properties: | ||
| bus-type: | ||
| const: 4 | ||
|
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| clock-lanes: | ||
| const: 0 | ||
|
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| data-lanes: | ||
| minItems: 1 | ||
| maxItems: 4 | ||
| items: | ||
| maximum: 4 | ||
|
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| required: | ||
| - data-lanes | ||
|
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| port@1: | ||
| $ref: /schemas/graph.yaml#/properties/port | ||
| description: | ||
| Stream 0 Output port node | ||
|
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| port@2: | ||
| $ref: /schemas/graph.yaml#/properties/port | ||
| description: | ||
| Stream 1 Output port node | ||
|
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| port@3: | ||
| $ref: /schemas/graph.yaml#/properties/port | ||
| description: | ||
| Stream 2 Output port node | ||
|
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| port@4: | ||
| $ref: /schemas/graph.yaml#/properties/port | ||
| description: | ||
| Stream 3 Output port node | ||
|
|
||
| required: | ||
| - port@0 | ||
|
|
||
| required: | ||
| - compatible | ||
| - reg | ||
| - clocks | ||
| - clock-names | ||
| - ports | ||
|
|
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| additionalProperties: false | ||
|
|
||
| examples: | ||
| - | | ||
| csi@d060000 { | ||
| compatible = "starfive,jh7110-csi2rx", "cdns,csi2rx"; | ||
| reg = <0x0d060000 0x1000>; | ||
| clocks = <&byteclock 7>, <&byteclock 6>, | ||
| <&coreclock 8>, <&coreclock 9>, | ||
| <&coreclock 10>, <&coreclock 11>; | ||
| clock-names = "sys_clk", "p_clk", | ||
| "pixel_if0_clk", "pixel_if1_clk", | ||
| "pixel_if2_clk", "pixel_if3_clk"; | ||
| resets = <&bytereset 9>, <&bytereset 4>, | ||
| <&corereset 5>, <&corereset 6>, | ||
| <&corereset 7>, <&corereset 8>; | ||
| reset-names = "sys", "reg_bank", | ||
| "pixel_if0", "pixel_if1", | ||
| "pixel_if2", "pixel_if3"; | ||
| phys = <&csi_phy>; | ||
| phy-names = "dphy"; | ||
| ports { | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
| port@0 { | ||
| reg = <0>; | ||
| csi2rx_in_sensor: endpoint { | ||
| remote-endpoint = <&sensor_out_csi2rx>; | ||
| clock-lanes = <0>; | ||
| data-lanes = <1 2>; | ||
| }; | ||
| }; | ||
| port@1 { | ||
| reg = <1>; | ||
| csi2rx_out_grabber0: endpoint { | ||
| remote-endpoint = <&grabber0_in_csi2rx>; | ||
| }; | ||
| }; | ||
| port@2 { | ||
| reg = <2>; | ||
| csi2rx_out_grabber1: endpoint { | ||
| remote-endpoint = <&grabber1_in_csi2rx>; | ||
| }; | ||
| }; | ||
| port@3 { | ||
| reg = <3>; | ||
| csi2rx_out_grabber2: endpoint { | ||
| remote-endpoint = <&grabber2_in_csi2rx>; | ||
| }; | ||
| }; | ||
| port@4 { | ||
| reg = <4>; | ||
| csi2rx_out_grabber3: endpoint { | ||
| remote-endpoint = <&grabber3_in_csi2rx>; | ||
| }; | ||
| }; | ||
| }; | ||
| }; | ||
| ... |
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