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arm64: dts: Remove inconsistent use of 'arm,armv8' compatible string
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The 'arm,armv8' compatible string is only for software models. It adds
little value otherwise and is inconsistently used as a fallback on some
platforms. Remove it from those platforms.

This fixes warnings generated by the DT schema.

Reported-by: Michal Simek <michal.simek@xilinx.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Acked-by: Antoine Tenart <antoine.tenart@bootlin.com>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Chanho Min <chanho.min@lge.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Wei Xu <xuwei5@hisilicon.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Chunyan Zhang <zhang.lyra@gmail.com>
Acked-by: Robert Richter <rrichter@cavium.com>
Acked-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Rob Herring authored and Arnd Bergmann committed Jan 30, 2019
1 parent abe60a3 commit 31af04c
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Showing 67 changed files with 427 additions and 427 deletions.
8 changes: 4 additions & 4 deletions arch/arm64/boot/dts/actions/s700.dtsi
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Expand Up @@ -18,28 +18,28 @@

cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x0>;
enable-method = "psci";
};

cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x1>;
enable-method = "psci";
};

cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x2>;
enable-method = "psci";
};

cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x3>;
enable-method = "psci";
};
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8 changes: 4 additions & 4 deletions arch/arm64/boot/dts/actions/s900.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -18,28 +18,28 @@

cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x0>;
enable-method = "psci";
};

cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x1>;
enable-method = "psci";
};

cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x2>;
enable-method = "psci";
};

cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x3>;
enable-method = "psci";
};
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8 changes: 4 additions & 4 deletions arch/arm64/boot/dts/al/alpine-v2.dtsi
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Expand Up @@ -47,28 +47,28 @@
#size-cells = <0>;

cpu@0 {
compatible = "arm,cortex-a57", "arm,armv8";
compatible = "arm,cortex-a57";
device_type = "cpu";
reg = <0x0 0x0>;
enable-method = "psci";
};

cpu@1 {
compatible = "arm,cortex-a57", "arm,armv8";
compatible = "arm,cortex-a57";
device_type = "cpu";
reg = <0x0 0x1>;
enable-method = "psci";
};

cpu@2 {
compatible = "arm,cortex-a57", "arm,armv8";
compatible = "arm,cortex-a57";
device_type = "cpu";
reg = <0x0 0x2>;
enable-method = "psci";
};

cpu@3 {
compatible = "arm,cortex-a57", "arm,armv8";
compatible = "arm,cortex-a57";
device_type = "cpu";
reg = <0x0 0x3>;
enable-method = "psci";
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8 changes: 4 additions & 4 deletions arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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Expand Up @@ -84,31 +84,31 @@
#size-cells = <0>;

cpu0: cpu@0 {
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <0>;
enable-method = "psci";
next-level-cache = <&L2>;
};

cpu1: cpu@1 {
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <1>;
enable-method = "psci";
next-level-cache = <&L2>;
};

cpu2: cpu@2 {
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <2>;
enable-method = "psci";
next-level-cache = <&L2>;
};

cpu3: cpu@3 {
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <3>;
enable-method = "psci";
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8 changes: 4 additions & 4 deletions arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
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Expand Up @@ -48,28 +48,28 @@
#size-cells = <0>;

cpu0: cpu@0 {
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <0>;
enable-method = "psci";
};

cpu@1 {
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <1>;
enable-method = "psci";
};

cpu@2 {
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <2>;
enable-method = "psci";
};

cpu@3 {
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <3>;
enable-method = "psci";
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8 changes: 4 additions & 4 deletions arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
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Expand Up @@ -22,28 +22,28 @@
#size-cells = <0>;

cpu0: cpu@0 {
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <0>;
enable-method = "psci";
};

cpu1: cpu@1 {
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <1>;
enable-method = "psci";
};

cpu2: cpu@2 {
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <2>;
enable-method = "psci";
};

cpu3: cpu@3 {
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <3>;
enable-method = "psci";
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8 changes: 4 additions & 4 deletions arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
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Expand Up @@ -42,28 +42,28 @@
#size-cells = <0>;

cpu0: cpu@0 {
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "psci";
reg = <0x0>;
};

cpu1: cpu@1 {
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "psci";
reg = <0x1>;
};

cpu2: cpu@2 {
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "psci";
reg = <0x2>;
};

cpu3: cpu@3 {
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "psci";
reg = <0x3>;
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8 changes: 4 additions & 4 deletions arch/arm64/boot/dts/amlogic/meson-axg.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -68,7 +68,7 @@

cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x0>;
enable-method = "psci";
next-level-cache = <&l2>;
Expand All @@ -77,7 +77,7 @@

cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x1>;
enable-method = "psci";
next-level-cache = <&l2>;
Expand All @@ -86,7 +86,7 @@

cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x2>;
enable-method = "psci";
next-level-cache = <&l2>;
Expand All @@ -95,7 +95,7 @@

cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x3>;
enable-method = "psci";
next-level-cache = <&l2>;
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8 changes: 4 additions & 4 deletions arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
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Expand Up @@ -20,31 +20,31 @@

cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x0>;
enable-method = "psci";
next-level-cache = <&l2>;
};

cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x1>;
enable-method = "psci";
next-level-cache = <&l2>;
};

cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x2>;
enable-method = "psci";
next-level-cache = <&l2>;
};

cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x3>;
enable-method = "psci";
next-level-cache = <&l2>;
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8 changes: 4 additions & 4 deletions arch/arm64/boot/dts/amlogic/meson-gx.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -56,7 +56,7 @@

cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x0>;
enable-method = "psci";
next-level-cache = <&l2>;
Expand All @@ -65,7 +65,7 @@

cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x1>;
enable-method = "psci";
next-level-cache = <&l2>;
Expand All @@ -74,7 +74,7 @@

cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x2>;
enable-method = "psci";
next-level-cache = <&l2>;
Expand All @@ -83,7 +83,7 @@

cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x3>;
enable-method = "psci";
next-level-cache = <&l2>;
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8 changes: 4 additions & 4 deletions arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
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Expand Up @@ -44,7 +44,7 @@

cpu4: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x100>;
enable-method = "psci";
next-level-cache = <&l2>;
Expand All @@ -53,7 +53,7 @@

cpu5: cpu@101 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x101>;
enable-method = "psci";
next-level-cache = <&l2>;
Expand All @@ -62,7 +62,7 @@

cpu6: cpu@102 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x102>;
enable-method = "psci";
next-level-cache = <&l2>;
Expand All @@ -71,7 +71,7 @@

cpu7: cpu@103 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x103>;
enable-method = "psci";
next-level-cache = <&l2>;
Expand Down
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