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hwmon: (coretemp) fix reading of microcode revision (v2)
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According to the documentation, simply reading the respective MSR
isn't sufficient: It should be written with zeros, cpuid(1) be
executed, and then read (see arch/x86/kernel/cpu/intel.c for an
example).

v2: Fail probe when microcode revision cannot be determined, but is
needed to check for proper operation.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: Chen Gong <gong.chen@linux.intel.com>
Cc: Jean Delvare <khali@linux-fr.org>
Acked-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
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Jan Beulich authored and Guenter Roeck committed Oct 25, 2010
1 parent 17c10d6 commit 3247800
Showing 1 changed file with 18 additions and 2 deletions.
20 changes: 18 additions & 2 deletions drivers/hwmon/coretemp.c
Original file line number Diff line number Diff line change
Expand Up @@ -289,6 +289,15 @@ static int __devinit get_tjmax(struct cpuinfo_x86 *c, u32 id,
}
}

static void __devinit get_ucode_rev_on_cpu(void *edx)
{
u32 eax;

wrmsr(MSR_IA32_UCODE_REV, 0, 0);
sync_core();
rdmsr(MSR_IA32_UCODE_REV, eax, *(u32 *)edx);
}

static int __devinit coretemp_probe(struct platform_device *pdev)
{
struct coretemp_data *data;
Expand Down Expand Up @@ -324,8 +333,15 @@ static int __devinit coretemp_probe(struct platform_device *pdev)

if ((c->x86_model == 0xe) && (c->x86_mask < 0xc)) {
/* check for microcode update */
rdmsr_on_cpu(data->id, MSR_IA32_UCODE_REV, &eax, &edx);
if (edx < 0x39) {
err = smp_call_function_single(data->id, get_ucode_rev_on_cpu,
&edx, 1);
if (err) {
dev_err(&pdev->dev,
"Cannot determine microcode revision of "
"CPU#%u (%d)!\n", data->id, err);
err = -ENODEV;
goto exit_free;
} else if (edx < 0x39) {
err = -ENODEV;
dev_err(&pdev->dev,
"Errata AE18 not fixed, update BIOS or "
Expand Down

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