Skip to content

Commit

Permalink
pwm: meson: Change MISC_CLK_SEL_WIDTH to MISC_CLK_SEL_MASK
Browse files Browse the repository at this point in the history
MISC_CLK_SEL_WIDTH is only used in one place where it's converted into
a bit-mask. Rename and change the macro to be a bit-mask so that
conversion is not needed anymore. No functional changes intended.

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
  • Loading branch information
Martin Blumenstingl authored and Thierry Reding committed Jun 26, 2019
1 parent 181164b commit 33cefd8
Showing 1 changed file with 2 additions and 2 deletions.
4 changes: 2 additions & 2 deletions drivers/pwm/pwm-meson.c
Original file line number Diff line number Diff line change
Expand Up @@ -33,7 +33,7 @@
#define MISC_A_CLK_DIV_SHIFT 8
#define MISC_B_CLK_SEL_SHIFT 6
#define MISC_A_CLK_SEL_SHIFT 4
#define MISC_CLK_SEL_WIDTH 2
#define MISC_CLK_SEL_MASK 0x3
#define MISC_B_EN BIT(1)
#define MISC_A_EN BIT(0)

Expand Down Expand Up @@ -472,7 +472,7 @@ static int meson_pwm_init_channels(struct meson_pwm *meson,

channel->mux.reg = meson->base + REG_MISC_AB;
channel->mux.shift = mux_reg_shifts[i];
channel->mux.mask = BIT(MISC_CLK_SEL_WIDTH) - 1;
channel->mux.mask = MISC_CLK_SEL_MASK;
channel->mux.flags = 0;
channel->mux.lock = &meson->lock;
channel->mux.table = NULL;
Expand Down

0 comments on commit 33cefd8

Please sign in to comment.