Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel…

…/git/cooloney/blackfin-2.6

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (85 commits)
  Blackfin char driver for Blackfin on-chip OTP memory (v3)
  Blackfin Serial Driver: fix bug - use mod_timer to replace only add_timer.
  Blackfin Serial Driver: the uart break anomaly has been given its own number, so switch to it
  Blackfin Serial Driver: use BFIN_UART_NR_PORTS to help SIR driver in uart port.
  Blackfin Serial Driver: Fix bug - kernel hangs when accessing uart 0 on bf537 when booting u-boot and linux on uart 1
  Blackfin Serial Driver: punt unused lsr variable
  Blackfin Serial Driver: Enable IR function when user application (irattach /dev/ttyBFx -s) call TIOCSETD ioctl with line discipline N_IRDA
  [Blackfin] arch: add include/boot .gitignore files
  [Blackfin] arch: Functional power management support: Add support for cpu frequency scaling
  [Blackfin] arch: Functional power management support: Remove broken cpu frequency scaling drivers
  [Blackfin] arch: Equalize include files: Add PLL_DIV Masks
  [Blackfin] arch: Add a warning about the value of CLKIN.
  [Blackfin] arch: take DDR DEVWD into consideration as well for BF548
  [Blackfin] arch: Remove the circular buffering mechanism for exceptions
  [Blackfin] arch: lose unnecessary dependency on CONFIG_BFIN_ICACHE for MPU
  [Blackfin] arch: fix bug - before assign new channel to the map register, need clear the bits first.
  [Blackfin] arch: add Blackfin on-chip SIR IrDA driver support
  [Blackfin] arch: BF54x memsizes are in mbits, not mbytes
  [Blackfin] arch: try to remove condition that causes double fault, by checking current before it gets dereferenced
  [Blackfin] arch: Update anomaly list.
  ...

arch/blackfin/Kconfig

@@ -47,10 +47,6 @@ config GENERIC_IRQ_PROBE
 	bool
 	default y
 
-config GENERIC_TIME
-	bool
-	default n
-
 config GENERIC_GPIO
 	bool
 	default y
@@ -224,16 +220,6 @@ config BF54x
 	depends on (BF542 || BF544 || BF547 || BF548 || BF549)
 	default y
 
-config BFIN_DUAL_CORE
-	bool
-	depends on (BF561)
-	default y
-
-config BFIN_SINGLE_CORE
-	bool
-	depends on !BFIN_DUAL_CORE
-	default y
-
 config MEM_GENERIC_BOARD
 	bool
 	depends on GENERIC_BOARD
@@ -263,7 +249,7 @@ config MEM_MT48LC8M32B2B5_7
 
 config MEM_MT48LC32M16A2TG_75
 	bool
-	depends on (BFIN527_EZKIT)
+	depends on (BFIN527_EZKIT || BFIN532_IP0X)
 	default y
 
 source "arch/blackfin/mach-bf527/Kconfig"
@@ -286,17 +272,34 @@ config CMDLINE
 	  to the kernel, you may specify one here. As a minimum, you should specify
 	  the memory size and the root device (e.g., mem=8M, root=/dev/nfs).
 
+config BOOT_LOAD
+	hex "Kernel load address for booting"
+	default "0x1000"
+	range 0x1000 0x20000000
+	help
+	  This option allows you to set the load address of the kernel.
+	  This can be useful if you are on a board which has a small amount
+	  of memory or you wish to reserve some memory at the beginning of
+	  the address space.
+
+	  Note that you need to keep this value above 4k (0x1000) as this
+	  memory region is used to capture NULL pointer references as well
+	  as some core kernel functions.
+
 comment "Clock/PLL Setup"
 
 config CLKIN_HZ
-	int "Crystal Frequency in Hz"
+	int "Frequency of the crystal on the board in Hz"
 	default "11059200" if BFIN533_STAMP
 	default "27000000" if BFIN533_EZKIT
 	default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS)
 	default "30000000" if BFIN561_EZKIT
 	default "24576000" if PNAV10
+	default "10000000" if BFIN532_IP0X
 	help
 	  The frequency of CLKIN crystal oscillator on the board in Hz.
+	  Warning: This value should match the crystal on the board. Otherwise,
+	  peripherals won't work properly.
 
 config BFIN_KERNEL_CLOCK
 	bool "Re-program Clocks while Kernel boots?"
@@ -307,6 +310,25 @@ config BFIN_KERNEL_CLOCK
 	  are also not changed, and the Bootloader does 100% of the hardware
 	  configuration.
 
+config MEM_SIZE
+	int "SDRAM Memory Size in MBytes"
+	depends on BFIN_KERNEL_CLOCK
+	default 64
+
+config MEM_ADD_WIDTH
+	int "Memory Address Width"
+	depends on BFIN_KERNEL_CLOCK
+	depends on (!BF54x)
+	range 8 11
+	default  9 if BFIN533_EZKIT
+	default  9 if BFIN561_EZKIT
+	default  9 if H8606_HVSISTEMAS
+	default 10 if BFIN527_EZKIT
+	default 10 if BFIN537_STAMP
+	default 11 if BFIN533_STAMP
+	default 10 if PNAV10
+	default 10 if BFIN532_IP0X
+
 config PLL_BYPASS
 	bool "Bypass PLL"
 	depends on BFIN_KERNEL_CLOCK
@@ -325,7 +347,7 @@ config VCO_MULT
 	range 1 64
 	default "22" if BFIN533_EZKIT
 	default "45" if BFIN533_STAMP
-	default "20" if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT)
+	default "20" if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT || BFIN548_BLUETECHNIX_CM)
 	default "22" if BFIN533_BLUETECHNIX_CM
 	default "20" if BFIN537_BLUETECHNIX_CM
 	default "20" if BFIN561_BLUETECHNIX_CM
@@ -360,19 +382,33 @@ config SCLK_DIV
 	int "System Clock Divider"
 	depends on BFIN_KERNEL_CLOCK
 	range 1 15
-	default 5 if BFIN533_EZKIT
-	default 5 if BFIN533_STAMP
-	default 4 if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT)
-	default 5 if BFIN533_BLUETECHNIX_CM
-	default 4 if BFIN537_BLUETECHNIX_CM
-	default 4 if BFIN561_BLUETECHNIX_CM
-	default 5 if BFIN561_EZKIT
-	default 3 if H8606_HVSISTEMAS
+	default 5
 	help
 	  This sets the frequency of the system clock (including SDRAM or DDR).
 	  This can be between 1 and 15
 	  System Clock = (PLL frequency) / (this setting)
 
+config MAX_MEM_SIZE
+	int "Max SDRAM Memory Size in MBytes"
+	depends on !BFIN_KERNEL_CLOCK && !MPU
+	default 512
+	help
+	  This is the max memory size that the kernel will create CPLB
+	  tables for.  Your system will not be able to handle any more.
+
+choice
+	prompt "DDR SDRAM Chip Type"
+	depends on BFIN_KERNEL_CLOCK
+	depends on BF54x
+	default MEM_MT46V32M16_5B
+
+config MEM_MT46V32M16_6T
+	bool "MT46V32M16_6T"
+
+config MEM_MT46V32M16_5B
+	bool "MT46V32M16_5B"
+endchoice
+
 #
 # Max & Min Speeds for various Chips
 #
@@ -415,42 +451,33 @@ comment "Kernel Timer/Scheduler"
 
 source kernel/Kconfig.hz
 
-comment "Memory Setup"
-
-config MEM_SIZE
-	int "SDRAM Memory Size in MBytes"
-	default  32 if BFIN533_EZKIT
-	default  64 if BFIN527_EZKIT
-	default  64 if BFIN537_STAMP
-	default  64 if BFIN548_EZKIT
-	default  64 if BFIN561_EZKIT
-	default 128 if BFIN533_STAMP
-	default  64 if PNAV10
-	default  32 if H8606_HVSISTEMAS
+config GENERIC_TIME
+	bool "Generic time"
+	default y
 
-config MEM_ADD_WIDTH
-	int "SDRAM Memory Address Width"
-	depends on (!BF54x)
-	default  9 if BFIN533_EZKIT
-	default  9 if BFIN561_EZKIT
-	default  9 if H8606_HVSISTEMAS
-	default 10 if BFIN527_EZKIT
-	default 10 if BFIN537_STAMP
-	default 11 if BFIN533_STAMP
-	default 10 if PNAV10
+config GENERIC_CLOCKEVENTS
+	bool "Generic clock events"
+	depends on GENERIC_TIME
+	default y
 
+config CYCLES_CLOCKSOURCE
+	bool "Use 'CYCLES' as a clocksource (EXPERIMENTAL)"
+	depends on EXPERIMENTAL
+	depends on GENERIC_CLOCKEVENTS
+	depends on !BFIN_SCRATCH_REG_CYCLES
+	default n
+	help
+	  If you say Y here, you will enable support for using the 'cycles'
+	  registers as a clock source.  Doing so means you will be unable to
+	  safely write to the 'cycles' register during runtime.  You will
+	  still be able to read it (such as for performance monitoring), but
+	  writing the registers will most likely crash the kernel.
 
-choice
-	prompt "DDR SDRAM Chip Type"
-	depends on BFIN548_EZKIT
-	default MEM_MT46V32M16_5B
+source kernel/time/Kconfig
 
-config MEM_MT46V32M16_6T
-        bool "MT46V32M16_6T"
+comment "Memory Setup"
 
-config MEM_MT46V32M16_5B
-        bool "MT46V32M16_5B"
-endchoice
+comment "Misc"
 
 config ENET_FLASH_PIN
 	int "PF port/pin used for flash and ethernet sharing"
@@ -462,20 +489,6 @@ config ENET_FLASH_PIN
 	  code.
 	  For example: PF0 --> 0,PF1 --> 1,PF2 --> 2, etc.
 
-config BOOT_LOAD
-	hex "Kernel load address for booting"
-	default "0x1000"
-	range 0x1000 0x20000000
-	help
-	  This option allows you to set the load address of the kernel.
-	  This can be useful if you are on a board which has a small amount
-	  of memory or you wish to reserve some memory at the beginning of
-	  the address space.
-
-	  Note that you need to keep this value above 4k (0x1000) as this
-	  memory region is used to capture NULL pointer references as well
-	  as some core kernel functions.
-
 choice
 	prompt "Blackfin Exception Scratch Register"
 	default BFIN_SCRATCH_REG_RETN
@@ -661,14 +674,6 @@ endchoice
 
 source "mm/Kconfig"
 
-config LARGE_ALLOCS
-	bool "Allow allocating large blocks (> 1MB) of memory"
-	help
-	  Allow the slab memory allocator to keep chains for very large
-	  memory sizes - upto 32MB. You may need this if your system has
-	  a lot of RAM, and you need to able to allocate very large
-	  contiguous chunks. If unsure, say N.
-
 config BFIN_GPTIMERS
 	tristate "Enable Blackfin General Purpose Timers API"
 	default n

arch/blackfin/Makefile

@@ -72,6 +72,11 @@ rev-$(CONFIG_BF_REV_ANY)  := any
 KBUILD_CFLAGS += -mcpu=$(cpu-y)-$(rev-y)
 KBUILD_AFLAGS += -mcpu=$(cpu-y)-$(rev-y)
 
+# - we utilize the silicon rev from the toolchain, so move it over to the checkflags
+# - the l1_text attribute is Blackfin specific, so fake it out as used to kill warnings
+CHECKFLAGS_SILICON = $(shell echo "" | $(CPP) $(KBUILD_CFLAGS) -dD - 2>/dev/null | awk '$$2 == "__SILICON_REVISION__" { print $$3 }')
+CHECKFLAGS += -D__SILICON_REVISION__=$(CHECKFLAGS_SILICON) -Dl1_text=__used__
+
 head-y   := arch/$(ARCH)/mach-$(MACHINE)/head.o arch/$(ARCH)/kernel/init_task.o
 
 core-y   += arch/$(ARCH)/kernel/ arch/$(ARCH)/mm/ arch/$(ARCH)/mach-common/

arch/blackfin/boot/.gitignore

@@ -0,0 +1 @@
++vmImage

arch/blackfin/configs/BF527-EZKIT_defconfig

@@ -13,7 +13,7 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
-# CONFIG_GENERIC_TIME is not set
+CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
@@ -250,7 +250,7 @@ CONFIG_HZ=250
 #
 # Memory Setup
 #
-CONFIG_MEM_SIZE=64
+CONFIG_MAX_MEM_SIZE=512
 CONFIG_MEM_ADD_WIDTH=10
 CONFIG_BOOT_LOAD=0x1000
 CONFIG_BFIN_SCRATCH_REG_RETN=y
@@ -720,8 +720,8 @@ CONFIG_BFIN_OTP=y
 #
 CONFIG_SERIAL_BFIN=y
 CONFIG_SERIAL_BFIN_CONSOLE=y
-# CONFIG_SERIAL_BFIN_DMA is not set
-CONFIG_SERIAL_BFIN_PIO=y
+CONFIG_SERIAL_BFIN_DMA=y
+# CONFIG_SERIAL_BFIN_PIO is not set
 # CONFIG_SERIAL_BFIN_UART0 is not set
 CONFIG_SERIAL_BFIN_UART1=y
 # CONFIG_BFIN_UART1_CTSRTS is not set

arch/blackfin/configs/BF533-EZKIT_defconfig

@@ -13,7 +13,7 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
-# CONFIG_GENERIC_TIME is not set
+CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
@@ -212,7 +212,7 @@ CONFIG_HZ=250
 #
 # Memory Setup
 #
-CONFIG_MEM_SIZE=32
+CONFIG_MAX_MEM_SIZE=512
 CONFIG_MEM_ADD_WIDTH=9
 CONFIG_BOOT_LOAD=0x1000
 CONFIG_BFIN_SCRATCH_REG_RETN=y

arch/blackfin/configs/BF533-STAMP_defconfig

@@ -13,7 +13,7 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
-# CONFIG_GENERIC_TIME is not set
+CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
@@ -212,7 +212,7 @@ CONFIG_HZ=250
 #
 # Memory Setup
 #
-CONFIG_MEM_SIZE=128
+CONFIG_MAX_MEM_SIZE=512
 CONFIG_MEM_ADD_WIDTH=11
 CONFIG_ENET_FLASH_PIN=0
 CONFIG_BOOT_LOAD=0x1000

arch/blackfin/configs/BF537-STAMP_defconfig

@@ -13,7 +13,7 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
-# CONFIG_GENERIC_TIME is not set
+CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
@@ -220,7 +220,7 @@ CONFIG_HZ=250
 #
 # Memory Setup
 #
-CONFIG_MEM_SIZE=64
+CONFIG_MAX_MEM_SIZE=512
 CONFIG_MEM_ADD_WIDTH=10
 CONFIG_BOOT_LOAD=0x1000
 CONFIG_BFIN_SCRATCH_REG_RETN=y

arch/blackfin/configs/BF548-EZKIT_defconfig

@@ -13,7 +13,7 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
-# CONFIG_GENERIC_TIME is not set
+CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
@@ -285,7 +285,7 @@ CONFIG_HZ=250
 #
 # Memory Setup
 #
-CONFIG_MEM_SIZE=64
+CONFIG_MAX_MEM_SIZE=512
 # CONFIG_MEM_MT46V32M16_6T is not set
 CONFIG_MEM_MT46V32M16_5B=y
 CONFIG_BOOT_LOAD=0x1000
@@ -813,8 +813,8 @@ CONFIG_HW_CONSOLE=y
 #
 CONFIG_SERIAL_BFIN=y
 CONFIG_SERIAL_BFIN_CONSOLE=y
-# CONFIG_SERIAL_BFIN_DMA is not set
-CONFIG_SERIAL_BFIN_PIO=y
+CONFIG_SERIAL_BFIN_DMA=y
+# CONFIG_SERIAL_BFIN_PIO is not set
 # CONFIG_SERIAL_BFIN_UART0 is not set
 CONFIG_SERIAL_BFIN_UART1=y
 # CONFIG_BFIN_UART1_CTSRTS is not set

arch/blackfin/configs/BF561-EZKIT_defconfig

@@ -13,7 +13,7 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
-# CONFIG_GENERIC_TIME is not set
+CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
@@ -256,7 +256,7 @@ CONFIG_HZ=250
 #
 # Memory Setup
 #
-CONFIG_MEM_SIZE=64
+CONFIG_MAX_MEM_SIZE=512
 CONFIG_MEM_ADD_WIDTH=9
 CONFIG_BOOT_LOAD=0x1000
 CONFIG_BFIN_SCRATCH_REG_RETN=y