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QE has module to support TDM, some other protocols supported by QE are based on TDM. add a qe-tdm lib, this lib provides functions to the protocols using TDM to configurate QE-TDM. Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Zhao Qiang
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David S. Miller
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/* | ||
* Copyright (C) 2015 Freescale Semiconductor, Inc. All rights reserved. | ||
* | ||
* Authors: Zhao Qiang <qiang.zhao@nxp.com> | ||
* | ||
* Description: | ||
* QE TDM API Set - TDM specific routines implementations. | ||
* | ||
* This program is free software; you can redistribute it and/or modify it | ||
* under the terms of the GNU General Public License as published by the | ||
* Free Software Foundation; either version 2 of the License, or (at your | ||
* option) any later version. | ||
*/ | ||
#include <linux/io.h> | ||
#include <linux/kernel.h> | ||
#include <linux/of_address.h> | ||
#include <linux/of_irq.h> | ||
#include <linux/of_platform.h> | ||
#include <soc/fsl/qe/qe_tdm.h> | ||
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static int set_tdm_framer(const char *tdm_framer_type) | ||
{ | ||
if (strcmp(tdm_framer_type, "e1") == 0) | ||
return TDM_FRAMER_E1; | ||
else if (strcmp(tdm_framer_type, "t1") == 0) | ||
return TDM_FRAMER_T1; | ||
else | ||
return -EINVAL; | ||
} | ||
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static void set_si_param(struct ucc_tdm *utdm, struct ucc_tdm_info *ut_info) | ||
{ | ||
struct si_mode_info *si_info = &ut_info->si_info; | ||
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if (utdm->tdm_mode == TDM_INTERNAL_LOOPBACK) { | ||
si_info->simr_crt = 1; | ||
si_info->simr_rfsd = 0; | ||
} | ||
} | ||
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int ucc_of_parse_tdm(struct device_node *np, struct ucc_tdm *utdm, | ||
struct ucc_tdm_info *ut_info) | ||
{ | ||
const char *sprop; | ||
int ret = 0; | ||
u32 val; | ||
struct resource *res; | ||
struct device_node *np2; | ||
static int siram_init_flag; | ||
struct platform_device *pdev; | ||
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sprop = of_get_property(np, "fsl,rx-sync-clock", NULL); | ||
if (sprop) { | ||
ut_info->uf_info.rx_sync = qe_clock_source(sprop); | ||
if ((ut_info->uf_info.rx_sync < QE_CLK_NONE) || | ||
(ut_info->uf_info.rx_sync > QE_RSYNC_PIN)) { | ||
pr_err("QE-TDM: Invalid rx-sync-clock property\n"); | ||
return -EINVAL; | ||
} | ||
} else { | ||
pr_err("QE-TDM: Invalid rx-sync-clock property\n"); | ||
return -EINVAL; | ||
} | ||
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sprop = of_get_property(np, "fsl,tx-sync-clock", NULL); | ||
if (sprop) { | ||
ut_info->uf_info.tx_sync = qe_clock_source(sprop); | ||
if ((ut_info->uf_info.tx_sync < QE_CLK_NONE) || | ||
(ut_info->uf_info.tx_sync > QE_TSYNC_PIN)) { | ||
pr_err("QE-TDM: Invalid tx-sync-clock property\n"); | ||
return -EINVAL; | ||
} | ||
} else { | ||
pr_err("QE-TDM: Invalid tx-sync-clock property\n"); | ||
return -EINVAL; | ||
} | ||
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ret = of_property_read_u32_index(np, "fsl,tx-timeslot-mask", 0, &val); | ||
if (ret) { | ||
pr_err("QE-TDM: Invalid tx-timeslot-mask property\n"); | ||
return -EINVAL; | ||
} | ||
utdm->tx_ts_mask = val; | ||
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ret = of_property_read_u32_index(np, "fsl,rx-timeslot-mask", 0, &val); | ||
if (ret) { | ||
ret = -EINVAL; | ||
pr_err("QE-TDM: Invalid rx-timeslot-mask property\n"); | ||
return ret; | ||
} | ||
utdm->rx_ts_mask = val; | ||
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ret = of_property_read_u32_index(np, "fsl,tdm-id", 0, &val); | ||
if (ret) { | ||
ret = -EINVAL; | ||
pr_err("QE-TDM: No fsl,tdm-id property for this UCC\n"); | ||
return ret; | ||
} | ||
utdm->tdm_port = val; | ||
ut_info->uf_info.tdm_num = utdm->tdm_port; | ||
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if (of_get_property(np, "fsl,tdm-internal-loopback", NULL)) | ||
utdm->tdm_mode = TDM_INTERNAL_LOOPBACK; | ||
else | ||
utdm->tdm_mode = TDM_NORMAL; | ||
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sprop = of_get_property(np, "fsl,tdm-framer-type", NULL); | ||
if (!sprop) { | ||
ret = -EINVAL; | ||
pr_err("QE-TDM: No tdm-framer-type property for UCC\n"); | ||
return ret; | ||
} | ||
ret = set_tdm_framer(sprop); | ||
if (ret < 0) | ||
return -EINVAL; | ||
utdm->tdm_framer_type = ret; | ||
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ret = of_property_read_u32_index(np, "fsl,siram-entry-id", 0, &val); | ||
if (ret) { | ||
ret = -EINVAL; | ||
pr_err("QE-TDM: No siram entry id for UCC\n"); | ||
return ret; | ||
} | ||
utdm->siram_entry_id = val; | ||
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set_si_param(utdm, ut_info); | ||
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np2 = of_find_compatible_node(NULL, NULL, "fsl,t1040-qe-si"); | ||
if (!np2) | ||
return -EINVAL; | ||
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pdev = of_find_device_by_node(np2); | ||
if (!pdev) { | ||
pr_err("%s: failed to lookup pdev\n", np2->name); | ||
of_node_put(np2); | ||
return -EINVAL; | ||
} | ||
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of_node_put(np2); | ||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
utdm->si_regs = devm_ioremap_resource(&pdev->dev, res); | ||
if (IS_ERR(utdm->si_regs)) { | ||
ret = PTR_ERR(utdm->si_regs); | ||
goto err_miss_siram_property; | ||
} | ||
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np2 = of_find_compatible_node(NULL, NULL, "fsl,t1040-qe-siram"); | ||
if (!np2) { | ||
ret = -EINVAL; | ||
goto err_miss_siram_property; | ||
} | ||
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pdev = of_find_device_by_node(np2); | ||
if (!pdev) { | ||
ret = -EINVAL; | ||
pr_err("%s: failed to lookup pdev\n", np2->name); | ||
of_node_put(np2); | ||
goto err_miss_siram_property; | ||
} | ||
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of_node_put(np2); | ||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
utdm->siram = devm_ioremap_resource(&pdev->dev, res); | ||
if (IS_ERR(utdm->siram)) { | ||
ret = PTR_ERR(utdm->siram); | ||
goto err_miss_siram_property; | ||
} | ||
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if (siram_init_flag == 0) { | ||
memset_io(utdm->siram, 0, res->end - res->start + 1); | ||
siram_init_flag = 1; | ||
} | ||
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return ret; | ||
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err_miss_siram_property: | ||
devm_iounmap(&pdev->dev, utdm->si_regs); | ||
return ret; | ||
} | ||
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void ucc_tdm_init(struct ucc_tdm *utdm, struct ucc_tdm_info *ut_info) | ||
{ | ||
struct si1 __iomem *si_regs; | ||
u16 __iomem *siram; | ||
u16 siram_entry_valid; | ||
u16 siram_entry_closed; | ||
u16 ucc_num; | ||
u8 csel; | ||
u16 sixmr; | ||
u16 tdm_port; | ||
u32 siram_entry_id; | ||
u32 mask; | ||
int i; | ||
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si_regs = utdm->si_regs; | ||
siram = utdm->siram; | ||
ucc_num = ut_info->uf_info.ucc_num; | ||
tdm_port = utdm->tdm_port; | ||
siram_entry_id = utdm->siram_entry_id; | ||
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if (utdm->tdm_framer_type == TDM_FRAMER_T1) | ||
utdm->num_of_ts = 24; | ||
if (utdm->tdm_framer_type == TDM_FRAMER_E1) | ||
utdm->num_of_ts = 32; | ||
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/* set siram table */ | ||
csel = (ucc_num < 4) ? ucc_num + 9 : ucc_num - 3; | ||
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siram_entry_valid = SIR_CSEL(csel) | SIR_BYTE | SIR_CNT(0); | ||
siram_entry_closed = SIR_IDLE | SIR_BYTE | SIR_CNT(0); | ||
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for (i = 0; i < utdm->num_of_ts; i++) { | ||
mask = 0x01 << i; | ||
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if (utdm->tx_ts_mask & mask) | ||
iowrite16be(siram_entry_valid, | ||
&siram[siram_entry_id * 32 + i]); | ||
else | ||
iowrite16be(siram_entry_closed, | ||
&siram[siram_entry_id * 32 + i]); | ||
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if (utdm->rx_ts_mask & mask) | ||
iowrite16be(siram_entry_valid, | ||
&siram[siram_entry_id * 32 + 0x200 + i]); | ||
else | ||
iowrite16be(siram_entry_closed, | ||
&siram[siram_entry_id * 32 + 0x200 + i]); | ||
} | ||
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setbits16(&siram[(siram_entry_id * 32) + (utdm->num_of_ts - 1)], | ||
SIR_LAST); | ||
setbits16(&siram[(siram_entry_id * 32) + 0x200 + (utdm->num_of_ts - 1)], | ||
SIR_LAST); | ||
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/* Set SIxMR register */ | ||
sixmr = SIMR_SAD(siram_entry_id); | ||
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sixmr &= ~SIMR_SDM_MASK; | ||
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if (utdm->tdm_mode == TDM_INTERNAL_LOOPBACK) | ||
sixmr |= SIMR_SDM_INTERNAL_LOOPBACK; | ||
else | ||
sixmr |= SIMR_SDM_NORMAL; | ||
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sixmr |= SIMR_RFSD(ut_info->si_info.simr_rfsd) | | ||
SIMR_TFSD(ut_info->si_info.simr_tfsd); | ||
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if (ut_info->si_info.simr_crt) | ||
sixmr |= SIMR_CRT; | ||
if (ut_info->si_info.simr_sl) | ||
sixmr |= SIMR_SL; | ||
if (ut_info->si_info.simr_ce) | ||
sixmr |= SIMR_CE; | ||
if (ut_info->si_info.simr_fe) | ||
sixmr |= SIMR_FE; | ||
if (ut_info->si_info.simr_gm) | ||
sixmr |= SIMR_GM; | ||
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switch (tdm_port) { | ||
case 0: | ||
iowrite16be(sixmr, &si_regs->sixmr1[0]); | ||
break; | ||
case 1: | ||
iowrite16be(sixmr, &si_regs->sixmr1[1]); | ||
break; | ||
case 2: | ||
iowrite16be(sixmr, &si_regs->sixmr1[2]); | ||
break; | ||
case 3: | ||
iowrite16be(sixmr, &si_regs->sixmr1[3]); | ||
break; | ||
default: | ||
pr_err("QE-TDM: can not find tdm sixmr reg\n"); | ||
break; | ||
} | ||
} |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,94 @@ | ||
/* | ||
* Internal header file for QE TDM mode routines. | ||
* | ||
* Copyright (C) 2016 Freescale Semiconductor, Inc. All rights reserved. | ||
* | ||
* Authors: Zhao Qiang <qiang.zhao@nxp.com> | ||
* | ||
* This program is free software; you can redistribute it and/or modify it | ||
* under the terms of the GNU General Public License as published by the | ||
* Free Software Foundation; either version 2 of the License, or (at your | ||
* option) any later version | ||
*/ | ||
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#ifndef CONFIG_QE_TDM_H | ||
#define CONFIG_QE_TDM_H | ||
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#include <linux/kernel.h> | ||
#include <linux/list.h> | ||
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#include <soc/fsl/qe/immap_qe.h> | ||
#include <soc/fsl/qe/qe.h> | ||
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#include <soc/fsl/qe/ucc.h> | ||
#include <soc/fsl/qe/ucc_fast.h> | ||
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/* SI RAM entries */ | ||
#define SIR_LAST 0x0001 | ||
#define SIR_BYTE 0x0002 | ||
#define SIR_CNT(x) ((x) << 2) | ||
#define SIR_CSEL(x) ((x) << 5) | ||
#define SIR_SGS 0x0200 | ||
#define SIR_SWTR 0x4000 | ||
#define SIR_MCC 0x8000 | ||
#define SIR_IDLE 0 | ||
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/* SIxMR fields */ | ||
#define SIMR_SAD(x) ((x) << 12) | ||
#define SIMR_SDM_NORMAL 0x0000 | ||
#define SIMR_SDM_INTERNAL_LOOPBACK 0x0800 | ||
#define SIMR_SDM_MASK 0x0c00 | ||
#define SIMR_CRT 0x0040 | ||
#define SIMR_SL 0x0020 | ||
#define SIMR_CE 0x0010 | ||
#define SIMR_FE 0x0008 | ||
#define SIMR_GM 0x0004 | ||
#define SIMR_TFSD(n) (n) | ||
#define SIMR_RFSD(n) ((n) << 8) | ||
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enum tdm_ts_t { | ||
TDM_TX_TS, | ||
TDM_RX_TS | ||
}; | ||
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enum tdm_framer_t { | ||
TDM_FRAMER_T1, | ||
TDM_FRAMER_E1 | ||
}; | ||
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enum tdm_mode_t { | ||
TDM_INTERNAL_LOOPBACK, | ||
TDM_NORMAL | ||
}; | ||
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struct si_mode_info { | ||
u8 simr_rfsd; | ||
u8 simr_tfsd; | ||
u8 simr_crt; | ||
u8 simr_sl; | ||
u8 simr_ce; | ||
u8 simr_fe; | ||
u8 simr_gm; | ||
}; | ||
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struct ucc_tdm_info { | ||
struct ucc_fast_info uf_info; | ||
struct si_mode_info si_info; | ||
}; | ||
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struct ucc_tdm { | ||
u16 tdm_port; /* port for this tdm:TDMA,TDMB */ | ||
u32 siram_entry_id; | ||
u16 __iomem *siram; | ||
struct si1 __iomem *si_regs; | ||
enum tdm_framer_t tdm_framer_type; | ||
enum tdm_mode_t tdm_mode; | ||
u8 num_of_ts; /* the number of timeslots in this tdm frame */ | ||
u32 tx_ts_mask; /* tx time slot mask */ | ||
u32 rx_ts_mask; /* rx time slot mask */ | ||
}; | ||
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int ucc_of_parse_tdm(struct device_node *np, struct ucc_tdm *utdm, | ||
struct ucc_tdm_info *ut_info); | ||
void ucc_tdm_init(struct ucc_tdm *utdm, struct ucc_tdm_info *ut_info); | ||
#endif |