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[ARM] 4794/1: S3C24XX: Comonise S3C2440 and S3C2442 clock code
Merge together the bits of the S3C2440 and S3C2442 clock code that can be. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,100 @@ | ||
| /* linux/arch/arm/plat-s3c24xx/s3c24xx-clock.c | ||
| * | ||
| * Copyright (c) 2004-2005,2008 Simtec Electronics | ||
| * http://armlinux.simtec.co.uk/ | ||
| * Ben Dooks <ben@simtec.co.uk> | ||
| * | ||
| * S3C2440/S3C2442 Common clock support | ||
| * | ||
| * This program is free software; you can redistribute it and/or modify | ||
| * it under the terms of the GNU General Public License as published by | ||
| * the Free Software Foundation; either version 2 of the License, or | ||
| * (at your option) any later version. | ||
| * | ||
| * This program is distributed in the hope that it will be useful, | ||
| * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| * GNU General Public License for more details. | ||
| * | ||
| * You should have received a copy of the GNU General Public License | ||
| * along with this program; if not, write to the Free Software | ||
| * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| */ | ||
|
|
||
| #include <linux/init.h> | ||
| #include <linux/module.h> | ||
| #include <linux/kernel.h> | ||
| #include <linux/list.h> | ||
| #include <linux/errno.h> | ||
| #include <linux/err.h> | ||
| #include <linux/device.h> | ||
| #include <linux/sysdev.h> | ||
| #include <linux/interrupt.h> | ||
| #include <linux/ioport.h> | ||
| #include <linux/mutex.h> | ||
| #include <linux/clk.h> | ||
|
|
||
| #include <asm/hardware.h> | ||
| #include <asm/atomic.h> | ||
| #include <asm/irq.h> | ||
| #include <asm/io.h> | ||
|
|
||
| #include <asm/arch/regs-clock.h> | ||
|
|
||
| #include <asm/plat-s3c24xx/clock.h> | ||
| #include <asm/plat-s3c24xx/cpu.h> | ||
|
|
||
| static int s3c244x_clk_add(struct sys_device *sysdev) | ||
| { | ||
| unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); | ||
| unsigned long clkdivn; | ||
| struct clk *clock_upll; | ||
|
|
||
| printk("S3C244X: Clock Support, DVS %s\n", | ||
| (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off"); | ||
|
|
||
| clock_upll = clk_get(NULL, "upll"); | ||
| if (IS_ERR(clock_upll)) { | ||
| printk(KERN_ERR "S3C244X: Failed to get upll clock\n"); | ||
| return -ENOENT; | ||
| } | ||
|
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| /* check rate of UPLL, and if it is near 96MHz, then change | ||
| * to using half the UPLL rate for the system */ | ||
|
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| if (clk_get_rate(clock_upll) > (94 * MHZ)) { | ||
| clk_usb_bus.rate = clk_get_rate(clock_upll) / 2; | ||
|
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| mutex_lock(&clocks_mutex); | ||
|
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| clkdivn = __raw_readl(S3C2410_CLKDIVN); | ||
| clkdivn |= S3C2440_CLKDIVN_UCLK; | ||
| __raw_writel(clkdivn, S3C2410_CLKDIVN); | ||
|
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| mutex_unlock(&clocks_mutex); | ||
| } | ||
|
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||
| return 0; | ||
| } | ||
|
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| static struct sysdev_driver s3c2440_clk_driver = { | ||
| .add = s3c244x_clk_add, | ||
| }; | ||
|
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| static int s3c2440_clk_init(void) | ||
| { | ||
| return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_clk_driver); | ||
| } | ||
|
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||
| arch_initcall(s3c2440_clk_init); | ||
|
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| static struct sysdev_driver s3c2442_clk_driver = { | ||
| .add = s3c244x_clk_add, | ||
| }; | ||
|
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| static int s3c2442_clk_init(void) | ||
| { | ||
| return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_clk_driver); | ||
| } | ||
|
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| arch_initcall(s3c2442_clk_init); |