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Merge remote-tracking branches 'spi/topic/drivers', 'spi/topic/dw', '…
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…spi/topic/efm32', 'spi/topic/ep93xx', 'spi/topic/fsl', 'spi/topic/fsl-dspi', 'spi/topic/fsl-espi' and 'spi/topic/gpio' into spi-next
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Mark Brown committed Mar 30, 2014
9 parents 9dee279 + 23e2c2a + c63f5da + 12f6dd8 + 56fc0b4 + 7282326 + 0e0cd9e + f0a7133 + e1bde3b commit 3bcbc14
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Showing 14 changed files with 117 additions and 128 deletions.
8 changes: 4 additions & 4 deletions Documentation/devicetree/bindings/spi/efm32-spi.txt
Original file line number Diff line number Diff line change
Expand Up @@ -3,24 +3,24 @@
Required properties:
- #address-cells: see spi-bus.txt
- #size-cells: see spi-bus.txt
- compatible: should be "efm32,spi"
- compatible: should be "energymicro,efm32-spi"
- reg: Offset and length of the register set for the controller
- interrupts: pair specifying rx and tx irq
- clocks: phandle to the spi clock
- cs-gpios: see spi-bus.txt
- location: Value to write to the ROUTE register's LOCATION bitfield to configure the pinmux for the device, see datasheet for values.
- efm32,location: Value to write to the ROUTE register's LOCATION bitfield to configure the pinmux for the device, see datasheet for values.

Example:

spi1: spi@0x4000c400 { /* USART1 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "efm32,spi";
compatible = "energymicro,efm32-spi";
reg = <0x4000c400 0x400>;
interrupts = <15 16>;
clocks = <&cmu 20>;
cs-gpios = <&gpio 51 1>; // D3
location = <1>;
efm32,location = <1>;
status = "ok";

ks8851@0 {
Expand Down
2 changes: 2 additions & 0 deletions Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,7 @@ Required properties:
- pinctrl-names: must contain a "default" entry.
- spi-num-chipselects : the number of the chipselect signals.
- bus-num : the slave chip chipselect signal number.
- big-endian : if DSPI modudle is big endian, the bool will be set in node.
Example:

dspi0@4002c000 {
Expand All @@ -24,6 +25,7 @@ dspi0@4002c000 {
bus-num = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dspi0_1>;
big-endian;
status = "okay";

sflash: at26df081a@0 {
Expand Down
3 changes: 2 additions & 1 deletion drivers/spi/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -270,6 +270,7 @@ config SPI_FSL_SPI
config SPI_FSL_DSPI
tristate "Freescale DSPI controller"
select SPI_BITBANG
select REGMAP_MMIO
depends on SOC_VF610 || COMPILE_TEST
help
This enables support for the Freescale DSPI controller in master
Expand Down Expand Up @@ -546,7 +547,7 @@ config SPI_DW_MID_DMA

config SPI_DW_MMIO
tristate "Memory-mapped io interface driver for DW SPI core"
depends on SPI_DESIGNWARE && HAVE_CLK
depends on SPI_DESIGNWARE

#
# There are lots of SPI device types, with sensors and memory
Expand Down
2 changes: 1 addition & 1 deletion drivers/spi/spi-dw-mmio.c
Original file line number Diff line number Diff line change
Expand Up @@ -66,7 +66,7 @@ static int dw_spi_mmio_probe(struct platform_device *pdev)
if (ret)
return ret;

dws->bus_num = 0;
dws->bus_num = pdev->id;
dws->num_cs = 4;
dws->max_freq = clk_get_rate(dwsmmio->clk);

Expand Down
17 changes: 2 additions & 15 deletions drivers/spi/spi-dw.c
Original file line number Diff line number Diff line change
Expand Up @@ -276,8 +276,7 @@ static void giveback(struct dw_spi *dws)
queue_work(dws->workqueue, &dws->pump_messages);
spin_unlock_irqrestore(&dws->lock, flags);

last_transfer = list_entry(msg->transfers.prev,
struct spi_transfer,
last_transfer = list_last_entry(&msg->transfers, struct spi_transfer,
transfer_list);

if (!last_transfer->cs_change && dws->cs_control)
Expand Down Expand Up @@ -439,12 +438,6 @@ static void pump_transfers(unsigned long data)

if (transfer->speed_hz != speed) {
speed = transfer->speed_hz;
if (speed > dws->max_freq) {
printk(KERN_ERR "MRST SPI0: unsupported"
"freq: %dHz\n", speed);
message->status = -EIO;
goto early_exit;
}

/* clk_div doesn't support odd number */
clk_div = dws->max_freq / speed;
Expand Down Expand Up @@ -671,12 +664,6 @@ static int dw_spi_setup(struct spi_device *spi)
return 0;
}

static void dw_spi_cleanup(struct spi_device *spi)
{
struct chip_data *chip = spi_get_ctldata(spi);
kfree(chip);
}

static int init_queue(struct dw_spi *dws)
{
INIT_LIST_HEAD(&dws->queue);
Expand Down Expand Up @@ -806,9 +793,9 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16);
master->bus_num = dws->bus_num;
master->num_chipselect = dws->num_cs;
master->cleanup = dw_spi_cleanup;
master->setup = dw_spi_setup;
master->transfer = dw_spi_transfer;
master->max_speed_hz = dws->max_freq;

/* Basic HW init */
spi_hw_init(dws);
Expand Down
39 changes: 15 additions & 24 deletions drivers/spi/spi-efm32.c
Original file line number Diff line number Diff line change
Expand Up @@ -287,17 +287,17 @@ static u32 efm32_spi_get_configured_location(struct efm32_spi_ddata *ddata)
return (reg & REG_ROUTE_LOCATION__MASK) >> __ffs(REG_ROUTE_LOCATION__MASK);
}

static int efm32_spi_probe_dt(struct platform_device *pdev,
static void efm32_spi_probe_dt(struct platform_device *pdev,
struct spi_master *master, struct efm32_spi_ddata *ddata)
{
struct device_node *np = pdev->dev.of_node;
u32 location;
int ret;

if (!np)
return 1;

ret = of_property_read_u32(np, "location", &location);
ret = of_property_read_u32(np, "efm32,location", &location);
if (ret)
/* fall back to old and (wrongly) generic property "location" */
ret = of_property_read_u32(np, "location", &location);
if (!ret) {
dev_dbg(&pdev->dev, "using location %u\n", location);
} else {
Expand All @@ -308,7 +308,6 @@ static int efm32_spi_probe_dt(struct platform_device *pdev,
}

ddata->pdata.location = location;
return 0;
}

static int efm32_spi_probe(struct platform_device *pdev)
Expand All @@ -318,9 +317,14 @@ static int efm32_spi_probe(struct platform_device *pdev)
int ret;
struct spi_master *master;
struct device_node *np = pdev->dev.of_node;
unsigned int num_cs, i;
int num_cs, i;

if (!np)
return -EINVAL;

num_cs = of_gpio_named_count(np, "cs-gpios");
if (num_cs < 0)
return num_cs;

master = spi_alloc_master(&pdev->dev,
sizeof(*ddata) + num_cs * sizeof(unsigned));
Expand Down Expand Up @@ -412,23 +416,7 @@ static int efm32_spi_probe(struct platform_device *pdev)
goto err;
}

ret = efm32_spi_probe_dt(pdev, master, ddata);
if (ret > 0) {
/* not created by device tree */
const struct efm32_spi_pdata *pdata =
dev_get_platdata(&pdev->dev);

if (pdata)
ddata->pdata = *pdata;
else
ddata->pdata.location =
efm32_spi_get_configured_location(ddata);

master->bus_num = pdev->id;

} else if (ret < 0) {
goto err_disable_clk;
}
efm32_spi_probe_dt(pdev, master, ddata);

efm32_spi_write32(ddata, 0, REG_IEN);
efm32_spi_write32(ddata, REG_ROUTE_TXPEN | REG_ROUTE_RXPEN |
Expand Down Expand Up @@ -484,6 +472,9 @@ static int efm32_spi_remove(struct platform_device *pdev)

static const struct of_device_id efm32_spi_dt_ids[] = {
{
.compatible = "energymicro,efm32-spi",
}, {
/* doesn't follow the "vendor,device" scheme, don't use */
.compatible = "efm32,spi",
}, {
/* sentinel */
Expand Down
21 changes: 5 additions & 16 deletions drivers/spi/spi-ep93xx.c
Original file line number Diff line number Diff line change
Expand Up @@ -73,8 +73,6 @@
* @clk: clock for the controller
* @regs_base: pointer to ioremap()'d registers
* @sspdr_phys: physical address of the SSPDR register
* @min_rate: minimum clock rate (in Hz) supported by the controller
* @max_rate: maximum clock rate (in Hz) supported by the controller
* @wait: wait here until given transfer is completed
* @current_msg: message that is currently processed (or %NULL if none)
* @tx: current byte in transfer to transmit
Expand All @@ -95,8 +93,6 @@ struct ep93xx_spi {
struct clk *clk;
void __iomem *regs_base;
unsigned long sspdr_phys;
unsigned long min_rate;
unsigned long max_rate;
struct completion wait;
struct spi_message *current_msg;
size_t tx;
Expand Down Expand Up @@ -199,9 +195,9 @@ static void ep93xx_spi_disable_interrupts(const struct ep93xx_spi *espi)
* @div_scr: pointer to return the scr divider
*/
static int ep93xx_spi_calc_divisors(const struct ep93xx_spi *espi,
unsigned long rate,
u8 *div_cpsr, u8 *div_scr)
u32 rate, u8 *div_cpsr, u8 *div_scr)
{
struct spi_master *master = platform_get_drvdata(espi->pdev);
unsigned long spi_clk_rate = clk_get_rate(espi->clk);
int cpsr, scr;

Expand All @@ -210,7 +206,7 @@ static int ep93xx_spi_calc_divisors(const struct ep93xx_spi *espi,
* controller. Note that minimum value is already checked in
* ep93xx_spi_transfer_one_message().
*/
rate = clamp(rate, espi->min_rate, espi->max_rate);
rate = clamp(rate, master->min_speed_hz, master->max_speed_hz);

/*
* Calculate divisors so that we can get speed according the
Expand Down Expand Up @@ -735,13 +731,6 @@ static int ep93xx_spi_transfer_one_message(struct spi_master *master,
struct spi_message *msg)
{
struct ep93xx_spi *espi = spi_master_get_devdata(master);
struct spi_transfer *t;

/* first validate each transfer */
list_for_each_entry(t, &msg->transfers, transfer_list) {
if (t->speed_hz < espi->min_rate)
return -EINVAL;
}

msg->state = NULL;
msg->status = 0;
Expand Down Expand Up @@ -917,8 +906,8 @@ static int ep93xx_spi_probe(struct platform_device *pdev)
* Calculate maximum and minimum supported clock rates
* for the controller.
*/
espi->max_rate = clk_get_rate(espi->clk) / 2;
espi->min_rate = clk_get_rate(espi->clk) / (254 * 256);
master->max_speed_hz = clk_get_rate(espi->clk) / 2;
master->min_speed_hz = clk_get_rate(espi->clk) / (254 * 256);
espi->pdev = pdev;

espi->sspdr_phys = res->start + SSPDR;
Expand Down
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