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These SoCs have a limited number of fixed rate clocks. Add support for the clk and clkdev api. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4894/
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John Crispin
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Feb 17, 2013
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/* | ||
* This program is free software; you can redistribute it and/or modify it | ||
* under the terms of the GNU General Public License version 2 as published | ||
* by the Free Software Foundation. | ||
* | ||
* Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> | ||
* Copyright (C) 2013 John Crispin <blogic@openwrt.org> | ||
*/ | ||
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#include <linux/kernel.h> | ||
#include <linux/module.h> | ||
#include <linux/clkdev.h> | ||
#include <linux/clk.h> | ||
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#include <asm/time.h> | ||
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#include "common.h" | ||
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struct clk { | ||
struct clk_lookup cl; | ||
unsigned long rate; | ||
}; | ||
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void ralink_clk_add(const char *dev, unsigned long rate) | ||
{ | ||
struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL); | ||
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if (!clk) | ||
panic("failed to add clock\n"); | ||
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clk->cl.dev_id = dev; | ||
clk->cl.clk = clk; | ||
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clk->rate = rate; | ||
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clkdev_add(&clk->cl); | ||
} | ||
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/* | ||
* Linux clock API | ||
*/ | ||
int clk_enable(struct clk *clk) | ||
{ | ||
return 0; | ||
} | ||
EXPORT_SYMBOL_GPL(clk_enable); | ||
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void clk_disable(struct clk *clk) | ||
{ | ||
} | ||
EXPORT_SYMBOL_GPL(clk_disable); | ||
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unsigned long clk_get_rate(struct clk *clk) | ||
{ | ||
return clk->rate; | ||
} | ||
EXPORT_SYMBOL_GPL(clk_get_rate); | ||
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void __init plat_time_init(void) | ||
{ | ||
struct clk *clk; | ||
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ralink_of_remap(); | ||
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ralink_clk_init(); | ||
clk = clk_get_sys("cpu", NULL); | ||
if (IS_ERR(clk)) | ||
panic("unable to get CPU clock, err=%ld", PTR_ERR(clk)); | ||
pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000); | ||
mips_hpt_frequency = clk_get_rate(clk) / 2; | ||
clk_put(clk); | ||
} |