Skip to content

Commit

Permalink
ice: prefix clock timer command enumeration values with ICE_PTP
Browse files Browse the repository at this point in the history 
The ice driver has an enumeration for the various commands that can be
programmed to the MAC and PHY for setting up hardware clock operations.
Prefix these with ICE_PTP so that they are clearly namespaced to the ice
driver.

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
  • Loading branch information
Sergey Temerkhanov authored and Tony Nguyen committed Sep 18, 2023
1 parent a5ea265 commit 40326b2
Show file tree
Hide file tree
Showing 2 changed files with 52 additions and 51 deletions.
93 changes: 47 additions & 46 deletions drivers/net/ethernet/intel/ice/ice_ptp_hw.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -242,19 +242,19 @@ static void ice_ptp_src_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd)
cmd_val = tmr_idx << SEL_CPK_SRC;

switch (cmd) {
case INIT_TIME:
case ICE_PTP_INIT_TIME:
cmd_val |= GLTSYN_CMD_INIT_TIME;
break;
case INIT_INCVAL:
case ICE_PTP_INIT_INCVAL:
cmd_val |= GLTSYN_CMD_INIT_INCVAL;
break;
case ADJ_TIME:
case ICE_PTP_ADJ_TIME:
cmd_val |= GLTSYN_CMD_ADJ_TIME;
break;
case ADJ_TIME_AT_TIME:
case ICE_PTP_ADJ_TIME_AT_TIME:
cmd_val |= GLTSYN_CMD_ADJ_INIT_TIME;
break;
case READ_TIME:
case ICE_PTP_READ_TIME:
cmd_val |= GLTSYN_CMD_READ_TIME;
break;
case ICE_PTP_NOP:
Expand Down Expand Up @@ -1151,7 +1151,7 @@ static int ice_ptp_init_phc_e822(struct ice_hw *hw)
* @time: Time to initialize the PHY port clocks to
*
* Program the PHY port registers with a new initial time value. The port
* clock will be initialized once the driver issues an INIT_TIME sync
* clock will be initialized once the driver issues an ICE_PTP_INIT_TIME sync
* command. The time value is the upper 32 bits of the PHY timer, usually in
* units of nominal nanoseconds.
*/
Expand Down Expand Up @@ -1200,7 +1200,7 @@ ice_ptp_prep_phy_time_e822(struct ice_hw *hw, u32 time)
*
* Program the port for an atomic adjustment by writing the Tx and Rx timer
* registers. The atomic adjustment won't be completed until the driver issues
* an ADJ_TIME command.
* an ICE_PTP_ADJ_TIME command.
*
* Note that time is not in units of nanoseconds. It is in clock time
* including the lower sub-nanosecond portion of the port timer.
Expand Down Expand Up @@ -1253,7 +1253,7 @@ ice_ptp_prep_port_adj_e822(struct ice_hw *hw, u8 port, s64 time)
*
* Prepare the PHY ports for an atomic time adjustment by programming the PHY
* Tx and Rx port registers. The actual adjustment is completed by issuing an
* ADJ_TIME or ADJ_TIME_AT_TIME sync command.
* ICE_PTP_ADJ_TIME or ICE_PTP_ADJ_TIME_AT_TIME sync command.
*/
static int
ice_ptp_prep_phy_adj_e822(struct ice_hw *hw, s32 adj)
Expand Down Expand Up @@ -1288,7 +1288,7 @@ ice_ptp_prep_phy_adj_e822(struct ice_hw *hw, s32 adj)
*
* Prepare each of the PHY ports for a new increment value by programming the
* port's TIMETUS registers. The new increment value will be updated after
* issuing an INIT_INCVAL command.
* issuing an ICE_PTP_INIT_INCVAL command.
*/
static int
ice_ptp_prep_phy_incval_e822(struct ice_hw *hw, u64 incval)
Expand Down Expand Up @@ -1374,19 +1374,19 @@ ice_ptp_write_port_cmd_e822(struct ice_hw *hw, u8 port, enum ice_ptp_tmr_cmd cmd
tmr_idx = ice_get_ptp_src_clock_index(hw);
cmd_val = tmr_idx << SEL_PHY_SRC;
switch (cmd) {
case INIT_TIME:
case ICE_PTP_INIT_TIME:
cmd_val |= PHY_CMD_INIT_TIME;
break;
case INIT_INCVAL:
case ICE_PTP_INIT_INCVAL:
cmd_val |= PHY_CMD_INIT_INCVAL;
break;
case ADJ_TIME:
case ICE_PTP_ADJ_TIME:
cmd_val |= PHY_CMD_ADJ_TIME;
break;
case READ_TIME:
case ICE_PTP_READ_TIME:
cmd_val |= PHY_CMD_READ_TIME;
break;
case ADJ_TIME_AT_TIME:
case ICE_PTP_ADJ_TIME_AT_TIME:
cmd_val |= PHY_CMD_ADJ_TIME_AT_TIME;
break;
case ICE_PTP_NOP:
Expand Down Expand Up @@ -2322,8 +2322,8 @@ int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port)
* @phy_time: on return, the 64bit PHY timer value
* @phc_time: on return, the lower 64bits of PHC time
*
* Issue a READ_TIME timer command to simultaneously capture the PHY and PHC
* timer values.
* Issue a ICE_PTP_READ_TIME timer command to simultaneously capture the PHY
* and PHC timer values.
*/
static int
ice_read_phy_and_phc_time_e822(struct ice_hw *hw, u8 port, u64 *phy_time,
Expand All @@ -2336,15 +2336,15 @@ ice_read_phy_and_phc_time_e822(struct ice_hw *hw, u8 port, u64 *phy_time,

tmr_idx = ice_get_ptp_src_clock_index(hw);

/* Prepare the PHC timer for a READ_TIME capture command */
ice_ptp_src_cmd(hw, READ_TIME);
/* Prepare the PHC timer for a ICE_PTP_READ_TIME capture command */
ice_ptp_src_cmd(hw, ICE_PTP_READ_TIME);

/* Prepare the PHY timer for a READ_TIME capture command */
err = ice_ptp_one_port_cmd(hw, port, READ_TIME);
/* Prepare the PHY timer for a ICE_PTP_READ_TIME capture command */
err = ice_ptp_one_port_cmd(hw, port, ICE_PTP_READ_TIME);
if (err)
return err;

/* Issue the sync to start the READ_TIME capture */
/* Issue the sync to start the ICE_PTP_READ_TIME capture */
ice_ptp_exec_tmr_cmd(hw);

/* Read the captured PHC time from the shadow time registers */
Expand Down Expand Up @@ -2378,10 +2378,11 @@ ice_read_phy_and_phc_time_e822(struct ice_hw *hw, u8 port, u64 *phy_time,
* @port: the PHY port to synchronize
*
* Perform an adjustment to ensure that the PHY and PHC timers are in sync.
* This is done by issuing a READ_TIME command which triggers a simultaneous
* read of the PHY timer and PHC timer. Then we use the difference to
* calculate an appropriate 2s complement addition to add to the PHY timer in
* order to ensure it reads the same value as the primary PHC timer.
* This is done by issuing a ICE_PTP_READ_TIME command which triggers a
* simultaneous read of the PHY timer and PHC timer. Then we use the
* difference to calculate an appropriate 2s complement addition to add
* to the PHY timer in order to ensure it reads the same value as the
* primary PHC timer.
*/
static int ice_sync_phy_timer_e822(struct ice_hw *hw, u8 port)
{
Expand Down Expand Up @@ -2411,7 +2412,7 @@ static int ice_sync_phy_timer_e822(struct ice_hw *hw, u8 port)
if (err)
goto err_unlock;

err = ice_ptp_one_port_cmd(hw, port, ADJ_TIME);
err = ice_ptp_one_port_cmd(hw, port, ICE_PTP_ADJ_TIME);
if (err)
goto err_unlock;

Expand Down Expand Up @@ -2534,7 +2535,7 @@ int ice_start_phy_timer_e822(struct ice_hw *hw, u8 port)
if (err)
return err;

err = ice_ptp_one_port_cmd(hw, port, INIT_INCVAL);
err = ice_ptp_one_port_cmd(hw, port, ICE_PTP_INIT_INCVAL);
if (err)
return err;

Expand Down Expand Up @@ -2562,7 +2563,7 @@ int ice_start_phy_timer_e822(struct ice_hw *hw, u8 port)
if (err)
return err;

err = ice_ptp_one_port_cmd(hw, port, INIT_INCVAL);
err = ice_ptp_one_port_cmd(hw, port, ICE_PTP_INIT_INCVAL);
if (err)
return err;

Expand Down Expand Up @@ -2883,7 +2884,7 @@ static int ice_ptp_init_phc_e810(struct ice_hw *hw)
*
* Program the PHY port ETH_GLTSYN_SHTIME registers in preparation setting the
* initial clock time. The time will not actually be programmed until the
* driver issues an INIT_TIME command.
* driver issues an ICE_PTP_INIT_TIME command.
*
* The time value is the upper 32 bits of the PHY timer, usually in units of
* nominal nanoseconds.
Expand Down Expand Up @@ -2918,7 +2919,7 @@ static int ice_ptp_prep_phy_time_e810(struct ice_hw *hw, u32 time)
*
* Prepare the PHY port for an atomic adjustment by programming the PHY
* ETH_GLTSYN_SHADJ_L and ETH_GLTSYN_SHADJ_H registers. The actual adjustment
* is completed by issuing an ADJ_TIME sync command.
* is completed by issuing an ICE_PTP_ADJ_TIME sync command.
*
* The adjustment value only contains the portion used for the upper 32bits of
* the PHY timer, usually in units of nominal nanoseconds. Negative
Expand Down Expand Up @@ -2958,7 +2959,7 @@ static int ice_ptp_prep_phy_adj_e810(struct ice_hw *hw, s32 adj)
*
* Prepare the PHY port for a new increment value by programming the PHY
* ETH_GLTSYN_SHADJ_L and ETH_GLTSYN_SHADJ_H registers. The actual change is
* completed by issuing an INIT_INCVAL command.
* completed by issuing an ICE_PTP_INIT_INCVAL command.
*/
static int ice_ptp_prep_phy_incval_e810(struct ice_hw *hw, u64 incval)
{
Expand Down Expand Up @@ -3001,19 +3002,19 @@ static int ice_ptp_port_cmd_e810(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd)
int err;

switch (cmd) {
case INIT_TIME:
case ICE_PTP_INIT_TIME:
cmd_val = GLTSYN_CMD_INIT_TIME;
break;
case INIT_INCVAL:
case ICE_PTP_INIT_INCVAL:
cmd_val = GLTSYN_CMD_INIT_INCVAL;
break;
case ADJ_TIME:
case ICE_PTP_ADJ_TIME:
cmd_val = GLTSYN_CMD_ADJ_TIME;
break;
case READ_TIME:
case ICE_PTP_READ_TIME:
cmd_val = GLTSYN_CMD_READ_TIME;
break;
case ADJ_TIME_AT_TIME:
case ICE_PTP_ADJ_TIME_AT_TIME:
cmd_val = GLTSYN_CMD_ADJ_INIT_TIME;
break;
case ICE_PTP_NOP:
Expand Down Expand Up @@ -3345,7 +3346,7 @@ int ice_ptp_init_time(struct ice_hw *hw, u64 time)
if (err)
return err;

return ice_ptp_tmr_cmd(hw, INIT_TIME);
return ice_ptp_tmr_cmd(hw, ICE_PTP_INIT_TIME);
}

/**
Expand All @@ -3358,8 +3359,8 @@ int ice_ptp_init_time(struct ice_hw *hw, u64 time)
*
* 1) Write the increment value to the source timer shadow registers
* 2) Write the increment value to the PHY timer shadow registers
* 3) Issue an INIT_INCVAL timer command to synchronously switch both the
* source and port timers to the new increment value at the next clock
* 3) Issue an ICE_PTP_INIT_INCVAL timer command to synchronously switch both
* the source and port timers to the new increment value at the next clock
* cycle.
*/
int ice_ptp_write_incval(struct ice_hw *hw, u64 incval)
Expand All @@ -3380,7 +3381,7 @@ int ice_ptp_write_incval(struct ice_hw *hw, u64 incval)
if (err)
return err;

return ice_ptp_tmr_cmd(hw, INIT_INCVAL);
return ice_ptp_tmr_cmd(hw, ICE_PTP_INIT_INCVAL);
}

/**
Expand Down Expand Up @@ -3414,8 +3415,8 @@ int ice_ptp_write_incval_locked(struct ice_hw *hw, u64 incval)
*
* 1) Write the adjustment to the source timer shadow registers
* 2) Write the adjustment to the PHY timer shadow registers
* 3) Issue an ADJ_TIME timer command to synchronously apply the adjustment to
* both the source and port timers at the next clock cycle.
* 3) Issue an ICE_PTP_ADJ_TIME timer command to synchronously apply the
* adjustment to both the source and port timers at the next clock cycle.
*/
int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj)
{
Expand All @@ -3425,9 +3426,9 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj)
tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned;

/* Write the desired clock adjustment into the GLTSYN_SHADJ register.
* For an ADJ_TIME command, this set of registers represents the value
* to add to the clock time. It supports subtraction by interpreting
* the value as a 2's complement integer.
* For an ICE_PTP_ADJ_TIME command, this set of registers represents
* the value to add to the clock time. It supports subtraction by
* interpreting the value as a 2's complement integer.
*/
wr32(hw, GLTSYN_SHADJ_L(tmr_idx), 0);
wr32(hw, GLTSYN_SHADJ_H(tmr_idx), adj);
Expand All @@ -3439,7 +3440,7 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj)
if (err)
return err;

return ice_ptp_tmr_cmd(hw, ADJ_TIME);
return ice_ptp_tmr_cmd(hw, ICE_PTP_ADJ_TIME);
}

/**
Expand Down
10 changes: 5 additions & 5 deletions drivers/net/ethernet/intel/ice/ice_ptp_hw.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -6,11 +6,11 @@
#include <linux/dpll.h>

enum ice_ptp_tmr_cmd {
INIT_TIME,
INIT_INCVAL,
ADJ_TIME,
ADJ_TIME_AT_TIME,
READ_TIME,
ICE_PTP_INIT_TIME,
ICE_PTP_INIT_INCVAL,
ICE_PTP_ADJ_TIME,
ICE_PTP_ADJ_TIME_AT_TIME,
ICE_PTP_READ_TIME,
ICE_PTP_NOP,
};

Expand Down

0 comments on commit 40326b2

Please sign in to comment.