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Merge branch 'stmmac-tegra186'
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Thierry Reding says:

====================
net: stmmac: Fixes and Tegra186 support

This series of patches start with a few cleanups that I ran across while
adding Tegra186 support to the stmmac driver. It then adds code for FIFO
size parsing from feature registers and finally enables support for the
incarnation of the Synopsys DWC QOS IP found on NVIDIA Tegra186 SoCs.

This is based on next-20170310.

Changes in v2:
- address review comments by Mikko and Joao
- add two additional cleanup patches
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller committed Mar 13, 2017
2 parents 8f48ba7 + e6ea2d1 commit 429a372
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Showing 7 changed files with 444 additions and 34 deletions.
6 changes: 3 additions & 3 deletions Documentation/devicetree/bindings/net/stmmac.txt
Original file line number Diff line number Diff line change
Expand Up @@ -28,9 +28,9 @@ Optional properties:
clocks may be specified in derived bindings.
- clock-names: One name for each entry in the clocks property, the
first one should be "stmmaceth" and the second one should be "pclk".
- clk_ptp_ref: this is the PTP reference clock; in case of the PTP is
available this clock is used for programming the Timestamp Addend Register.
If not passed then the system clock will be used and this is fine on some
- ptp_ref: this is the PTP reference clock; in case of the PTP is available
this clock is used for programming the Timestamp Addend Register. If not
passed then the system clock will be used and this is fine on some
platforms.
- tx-fifo-depth: See ethernet.txt file in the same directory
- rx-fifo-depth: See ethernet.txt file in the same directory
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3 changes: 3 additions & 0 deletions drivers/net/ethernet/stmicro/stmmac/common.h
Original file line number Diff line number Diff line change
Expand Up @@ -324,6 +324,9 @@ struct dma_features {
unsigned int number_tx_queues;
/* Alternate (enhanced) DESC mode */
unsigned int enh_desc;
/* TX and RX FIFO sizes */
unsigned int tx_fifo_size;
unsigned int rx_fifo_size;
};

/* GMAC TX FIFO is 8K, Rx FIFO is 16K */
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