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iommu/amd: Introduce iommu_v1_iova_to_phys
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This implements iova_to_phys for AMD IOMMU v1 pagetable,
which will be used by the IO page table framework.

Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Link: https://lore.kernel.org/r/20201215073705.123786-12-suravee.suthikulpanit@amd.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
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Suravee Suthikulpanit authored and Joerg Roedel committed Jan 28, 2021
1 parent 0633bbc commit 441555c
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Showing 2 changed files with 23 additions and 15 deletions.
22 changes: 22 additions & 0 deletions drivers/iommu/amd/io_pgtable.c
Original file line number Diff line number Diff line change
Expand Up @@ -488,6 +488,26 @@ unsigned long iommu_unmap_page(struct protection_domain *dom,
return unmapped;
}

static phys_addr_t iommu_v1_iova_to_phys(struct io_pgtable_ops *ops, unsigned long iova)
{
struct amd_io_pgtable *pgtable = io_pgtable_ops_to_data(ops);
unsigned long offset_mask, pte_pgsize;
u64 *pte, __pte;

if (pgtable->mode == PAGE_MODE_NONE)
return iova;

pte = fetch_pte(pgtable, iova, &pte_pgsize);

if (!pte || !IOMMU_PTE_PRESENT(*pte))
return 0;

offset_mask = pte_pgsize - 1;
__pte = __sme_clr(*pte & PM_ADDR_MASK);

return (__pte & ~offset_mask) | (iova & offset_mask);
}

/*
* ----------------------------------------------------
*/
Expand Down Expand Up @@ -528,6 +548,8 @@ static struct io_pgtable *v1_alloc_pgtable(struct io_pgtable_cfg *cfg, void *coo
cfg->oas = IOMMU_OUT_ADDR_BIT_SIZE,
cfg->tlb = &v1_flush_ops;

pgtable->iop.ops.iova_to_phys = iommu_v1_iova_to_phys;

return &pgtable->iop;
}

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16 changes: 1 addition & 15 deletions drivers/iommu/amd/iommu.c
Original file line number Diff line number Diff line change
Expand Up @@ -2100,22 +2100,8 @@ static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom,
{
struct protection_domain *domain = to_pdomain(dom);
struct io_pgtable_ops *ops = &domain->iop.iop.ops;
struct amd_io_pgtable *pgtable = io_pgtable_ops_to_data(ops);
unsigned long offset_mask, pte_pgsize;
u64 *pte, __pte;

if (domain->iop.mode == PAGE_MODE_NONE)
return iova;

pte = fetch_pte(pgtable, iova, &pte_pgsize);

if (!pte || !IOMMU_PTE_PRESENT(*pte))
return 0;

offset_mask = pte_pgsize - 1;
__pte = __sme_clr(*pte & PM_ADDR_MASK);

return (__pte & ~offset_mask) | (iova & offset_mask);
return ops->iova_to_phys(ops, iova);
}

static bool amd_iommu_capable(enum iommu_cap cap)
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