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dt-bindings: net: add DT bindings for Microsemi Ocelot Switch
DT bindings for the Ethernet switch found on Microsemi Ocelot platforms. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Microsemi Ocelot network Switch | ||
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The Microsemi Ocelot network switch can be found on Microsemi SoCs (VSC7513, | ||
VSC7514) | ||
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Required properties: | ||
- compatible: Should be "mscc,vsc7514-switch" | ||
- reg: Must contain an (offset, length) pair of the register set for each | ||
entry in reg-names. | ||
- reg-names: Must include the following entries: | ||
- "sys" | ||
- "rew" | ||
- "qs" | ||
- "hsio" | ||
- "qsys" | ||
- "ana" | ||
- "portX" with X from 0 to the number of last port index available on that | ||
switch | ||
- interrupts: Should contain the switch interrupts for frame extraction and | ||
frame injection | ||
- interrupt-names: should contain the interrupt names: "xtr", "inj" | ||
- ethernet-ports: A container for child nodes representing switch ports. | ||
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The ethernet-ports container has the following properties | ||
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Required properties: | ||
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- #address-cells: Must be 1 | ||
- #size-cells: Must be 0 | ||
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Each port node must have the following mandatory properties: | ||
- reg: Describes the port address in the switch | ||
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Port nodes may also contain the following optional standardised | ||
properties, described in binding documents: | ||
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- phy-handle: Phandle to a PHY on an MDIO bus. See | ||
Documentation/devicetree/bindings/net/ethernet.txt for details. | ||
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Example: | ||
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switch@1010000 { | ||
compatible = "mscc,vsc7514-switch"; | ||
reg = <0x1010000 0x10000>, | ||
<0x1030000 0x10000>, | ||
<0x1080000 0x100>, | ||
<0x10d0000 0x10000>, | ||
<0x11e0000 0x100>, | ||
<0x11f0000 0x100>, | ||
<0x1200000 0x100>, | ||
<0x1210000 0x100>, | ||
<0x1220000 0x100>, | ||
<0x1230000 0x100>, | ||
<0x1240000 0x100>, | ||
<0x1250000 0x100>, | ||
<0x1260000 0x100>, | ||
<0x1270000 0x100>, | ||
<0x1280000 0x100>, | ||
<0x1800000 0x80000>, | ||
<0x1880000 0x10000>; | ||
reg-names = "sys", "rew", "qs", "hsio", "port0", | ||
"port1", "port2", "port3", "port4", "port5", | ||
"port6", "port7", "port8", "port9", "port10", | ||
"qsys", "ana"; | ||
interrupts = <21 22>; | ||
interrupt-names = "xtr", "inj"; | ||
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ethernet-ports { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
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port0: port@0 { | ||
reg = <0>; | ||
phy-handle = <&phy0>; | ||
}; | ||
port1: port@1 { | ||
reg = <1>; | ||
phy-handle = <&phy1>; | ||
}; | ||
}; | ||
}; |