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staging: qlge: qlge_mpi: Simplify while statements.
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Simplify while loops into more readable and simple for loops.

Signed-off-by: Suraj Upadhyay <usuraj35@gmail.com>
Link: https://lore.kernel.org/r/6eb96e8c074bbdee3838b6421d25b50f1faffb3d.1594642213.git.usuraj35@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Suraj Upadhyay authored and Greg Kroah-Hartman committed Jul 13, 2020
1 parent 73b3044 commit 45170f1
Showing 1 changed file with 15 additions and 17 deletions.
32 changes: 15 additions & 17 deletions drivers/staging/qlge/qlge_mpi.c
Original file line number Diff line number Diff line change
Expand Up @@ -17,36 +17,34 @@ int ql_unpause_mpi_risc(struct ql_adapter *qdev)
int ql_pause_mpi_risc(struct ql_adapter *qdev)
{
u32 tmp;
int count = UDELAY_COUNT;
int count;

/* Pause the RISC */
ql_write32(qdev, CSR, CSR_CMD_SET_PAUSE);
do {
for (count = UDELAY_COUNT; count; count--) {
tmp = ql_read32(qdev, CSR);
if (tmp & CSR_RP)
break;
mdelay(UDELAY_DELAY);
count--;
} while (count);
}
return (count == 0) ? -ETIMEDOUT : 0;
}

int ql_hard_reset_mpi_risc(struct ql_adapter *qdev)
{
u32 tmp;
int count = UDELAY_COUNT;
int count;

/* Reset the RISC */
ql_write32(qdev, CSR, CSR_CMD_SET_RST);
do {
for (count = UDELAY_COUNT; count; count--) {
tmp = ql_read32(qdev, CSR);
if (tmp & CSR_RR) {
ql_write32(qdev, CSR, CSR_CMD_CLR_RST);
break;
}
mdelay(UDELAY_DELAY);
count--;
} while (count);
}
return (count == 0) ? -ETIMEDOUT : 0;
}

Expand Down Expand Up @@ -147,15 +145,15 @@ static int ql_get_mb_sts(struct ql_adapter *qdev, struct mbox_params *mbcp)
*/
static int ql_wait_mbx_cmd_cmplt(struct ql_adapter *qdev)
{
int count = 100;
int count;
u32 value;

do {
for (count = 100; count; count--) {
value = ql_read32(qdev, STS);
if (value & STS_PI)
return 0;
mdelay(UDELAY_DELAY); /* 100ms */
} while (--count);
}
return -ETIMEDOUT;
}

Expand Down Expand Up @@ -914,10 +912,10 @@ int ql_mb_wol_set_magic(struct ql_adapter *qdev, u32 enable_wol)
static int ql_idc_wait(struct ql_adapter *qdev)
{
int status = -ETIMEDOUT;
long wait_time = 1 * HZ;
struct mbox_params *mbcp = &qdev->idc_mbc;
long wait_time;

do {
for (wait_time = 1 * HZ; wait_time;) {
/* Wait here for the command to complete
* via the IDC process.
*/
Expand Down Expand Up @@ -947,7 +945,7 @@ static int ql_idc_wait(struct ql_adapter *qdev)
status = -EIO;
break;
}
} while (wait_time);
}

return status;
}
Expand Down Expand Up @@ -1080,18 +1078,18 @@ static int ql_mb_get_mgmnt_traffic_ctl(struct ql_adapter *qdev, u32 *control)

int ql_wait_fifo_empty(struct ql_adapter *qdev)
{
int count = 5;
int count;
u32 mgmnt_fifo_empty;
u32 nic_fifo_empty;

do {
for (count = 6; count; count--) {
nic_fifo_empty = ql_read32(qdev, STS) & STS_NFE;
ql_mb_get_mgmnt_traffic_ctl(qdev, &mgmnt_fifo_empty);
mgmnt_fifo_empty &= MB_GET_MPI_TFK_FIFO_EMPTY;
if (nic_fifo_empty && mgmnt_fifo_empty)
return 0;
msleep(100);
} while (count-- > 0);
}
return -ETIMEDOUT;
}

Expand Down

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