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ARM: OMAP: ctrl: Fix CONTROL_DSIPHY register fields
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Fix the shift and mask macros for DSIx_PPID fields in CONTROL_DSIPHY. The
OMAP4430 Public TRM vV has these fields mentioned correctly.

Signed-off-by: Archit Taneja <archit@ti.com>
Acked-by: Benoit Cousson <b-cousson@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Archit Taneja authored and Paul Walmsley committed Oct 7, 2011
1 parent be73246 commit 46f8c3c
Showing 1 changed file with 4 additions and 4 deletions.
8 changes: 4 additions & 4 deletions arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
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Original file line number Diff line number Diff line change
Expand Up @@ -941,10 +941,10 @@
#define OMAP4_DSI2_LANEENABLE_MASK (0x7 << 29)
#define OMAP4_DSI1_LANEENABLE_SHIFT 24
#define OMAP4_DSI1_LANEENABLE_MASK (0x1f << 24)
#define OMAP4_DSI1_PIPD_SHIFT 19
#define OMAP4_DSI1_PIPD_MASK (0x1f << 19)
#define OMAP4_DSI2_PIPD_SHIFT 14
#define OMAP4_DSI2_PIPD_MASK (0x1f << 14)
#define OMAP4_DSI2_PIPD_SHIFT 19
#define OMAP4_DSI2_PIPD_MASK (0x1f << 19)
#define OMAP4_DSI1_PIPD_SHIFT 14
#define OMAP4_DSI1_PIPD_MASK (0x1f << 14)

/* CONTROL_MCBSPLP */
#define OMAP4_ALBCTRLRX_FSX_SHIFT 31
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