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scsi: ufs: make the UFS variant a platform device
This change turns the UFS variant (SCSI_UFS_QCOM) into a UFS a platform device. In order to do so a few additional changes are required: 1. The ufshcd-pltfrm is no longer serves as a platform device. Now it only serves as a group of platform APIs such as PM APIs (runtime suspend/resume, system suspend/resume etc), parsers of clocks, regulators and pm_levels from DT. 2. What used to be the old platform "probe" is now "only" a pltfrm_init() routine, that does exactly the same, but only being called by the new probe function of the UFS variant. Reviewed-by: Rob Herring <robherring2@gmail.com> Reviewed-by: Gilad Broner <gbroner@codeaurora.org> Signed-off-by: Yaniv Gardi <ygardi@codeaurora.org> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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Yaniv Gardi
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Martin K. Petersen
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Nov 9, 2015
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* Qualcomm Technologies Inc Universal Flash Storage (UFS) PHY | ||
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UFSPHY nodes are defined to describe on-chip UFS PHY hardware macro. | ||
Each UFS PHY node should have its own node. | ||
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To bind UFS PHY with UFS host controller, the controller node should | ||
contain a phandle reference to UFS PHY node. | ||
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Required properties: | ||
- compatible : compatible list, contains "qcom,ufs-phy-qmp-20nm" | ||
or "qcom,ufs-phy-qmp-14nm" according to the relevant phy in use. | ||
- reg : should contain PHY register address space (mandatory), | ||
- reg-names : indicates various resources passed to driver (via reg proptery) by name. | ||
Required "reg-names" is "phy_mem". | ||
- #phy-cells : This property shall be set to 0 | ||
- vdda-phy-supply : phandle to main PHY supply for analog domain | ||
- vdda-pll-supply : phandle to PHY PLL and Power-Gen block power supply | ||
- clocks : List of phandle and clock specifier pairs | ||
- clock-names : List of clock input name strings sorted in the same | ||
order as the clocks property. "ref_clk_src", "ref_clk", | ||
"tx_iface_clk" & "rx_iface_clk" are mandatory but | ||
"ref_clk_parent" is optional | ||
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Optional properties: | ||
- vdda-phy-max-microamp : specifies max. load that can be drawn from phy supply | ||
- vdda-pll-max-microamp : specifies max. load that can be drawn from pll supply | ||
- vddp-ref-clk-supply : phandle to UFS device ref_clk pad power supply | ||
- vddp-ref-clk-max-microamp : specifies max. load that can be drawn from this supply | ||
- vddp-ref-clk-always-on : specifies if this supply needs to be kept always on | ||
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Example: | ||
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ufsphy1: ufsphy@0xfc597000 { | ||
compatible = "qcom,ufs-phy-qmp-20nm"; | ||
reg = <0xfc597000 0x800>; | ||
reg-names = "phy_mem"; | ||
#phy-cells = <0>; | ||
vdda-phy-supply = <&pma8084_l4>; | ||
vdda-pll-supply = <&pma8084_l12>; | ||
vdda-phy-max-microamp = <50000>; | ||
vdda-pll-max-microamp = <1000>; | ||
clock-names = "ref_clk_src", | ||
"ref_clk_parent", | ||
"ref_clk", | ||
"tx_iface_clk", | ||
"rx_iface_clk"; | ||
clocks = <&clock_rpm clk_ln_bb_clk>, | ||
<&clock_gcc clk_pcie_1_phy_ldo >, | ||
<&clock_gcc clk_ufs_phy_ldo>, | ||
<&clock_gcc clk_gcc_ufs_tx_cfg_clk>, | ||
<&clock_gcc clk_gcc_ufs_rx_cfg_clk>; | ||
}; | ||
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ufshc@0xfc598000 { | ||
... | ||
phys = <&ufsphy1>; | ||
phy-names = "ufsphy"; | ||
}; |
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/* Copyright (c) 2015, The Linux Foundation. All rights reserved. | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 and | ||
* only version 2 as published by the Free Software Foundation. | ||
* | ||
* This program is distributed in the hope that it will be useful, | ||
* but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
* GNU General Public License for more details. | ||
* | ||
*/ | ||
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#ifndef UFSHCD_PLTFRM_H_ | ||
#define UFSHCD_PLTFRM_H_ | ||
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#include "ufshcd.h" | ||
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int ufshcd_pltfrm_init(struct platform_device *pdev, | ||
struct ufs_hba_variant_ops *vops); | ||
void ufshcd_pltfrm_shutdown(struct platform_device *pdev); | ||
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#ifdef CONFIG_PM | ||
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int ufshcd_pltfrm_suspend(struct device *dev); | ||
int ufshcd_pltfrm_resume(struct device *dev); | ||
int ufshcd_pltfrm_runtime_suspend(struct device *dev); | ||
int ufshcd_pltfrm_runtime_resume(struct device *dev); | ||
int ufshcd_pltfrm_runtime_idle(struct device *dev); | ||
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#else /* !CONFIG_PM */ | ||
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#define ufshcd_pltfrm_suspend NULL | ||
#define ufshcd_pltfrm_resume NULL | ||
#define ufshcd_pltfrm_runtime_suspend NULL | ||
#define ufshcd_pltfrm_runtime_resume NULL | ||
#define ufshcd_pltfrm_runtime_idle NULL | ||
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#endif /* CONFIG_PM */ | ||
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#endif /* UFSHCD_PLTFRM_H_ */ |
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