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net: phy: mscc: add constants for used interrupt mask bits
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Add constants for the used interrupts bits. This avoids the magic
number for MII_VSC85XX_INT_MASK_MASK.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Heiner Kallweit authored and David S. Miller committed Mar 2, 2020
1 parent 5a8b7c4 commit 48938b1
Showing 1 changed file with 8 additions and 2 deletions.
10 changes: 8 additions & 2 deletions drivers/net/phy/mscc.c
Original file line number Diff line number Diff line change
Expand Up @@ -80,10 +80,16 @@ enum rgmii_rx_clock_delay {
#define MSCC_PHY_EXT_PHY_CNTL_2 24

#define MII_VSC85XX_INT_MASK 25
#define MII_VSC85XX_INT_MASK_MASK 0xa020
#define MII_VSC85XX_INT_MASK_WOL 0x0040
#define MII_VSC85XX_INT_MASK_MDINT BIT(15)
#define MII_VSC85XX_INT_MASK_LINK_CHG BIT(13)
#define MII_VSC85XX_INT_MASK_WOL BIT(6)
#define MII_VSC85XX_INT_MASK_EXT BIT(5)
#define MII_VSC85XX_INT_STATUS 26

#define MII_VSC85XX_INT_MASK_MASK (MII_VSC85XX_INT_MASK_MDINT | \
MII_VSC85XX_INT_MASK_LINK_CHG | \
MII_VSC85XX_INT_MASK_EXT)

#define MSCC_PHY_WOL_MAC_CONTROL 27
#define EDGE_RATE_CNTL_POS 5
#define EDGE_RATE_CNTL_MASK 0x00E0
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