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net: dsa: mv88e6xxx: convert 88e6185 to phylink_pcs
Convert the 88E6185 SERDES code to use the phylink_pcs infrastructure. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,190 @@ | ||
| // SPDX-License-Identifier: GPL-2.0-or-later | ||
| /* | ||
| * Marvell 88E6185 family SERDES PCS support | ||
| * | ||
| * Copyright (c) 2008 Marvell Semiconductor | ||
| * | ||
| * Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch> | ||
| */ | ||
| #include <linux/phylink.h> | ||
|
|
||
| #include "global2.h" | ||
| #include "port.h" | ||
| #include "serdes.h" | ||
|
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| struct mv88e6185_pcs { | ||
| struct phylink_pcs phylink_pcs; | ||
| unsigned int irq; | ||
| char name[64]; | ||
|
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| struct mv88e6xxx_chip *chip; | ||
| int port; | ||
| }; | ||
|
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| static struct mv88e6185_pcs *pcs_to_mv88e6185_pcs(struct phylink_pcs *pcs) | ||
| { | ||
| return container_of(pcs, struct mv88e6185_pcs, phylink_pcs); | ||
| } | ||
|
|
||
| static irqreturn_t mv88e6185_pcs_handle_irq(int irq, void *dev_id) | ||
| { | ||
| struct mv88e6185_pcs *mpcs = dev_id; | ||
| struct mv88e6xxx_chip *chip; | ||
| irqreturn_t ret = IRQ_NONE; | ||
| bool link_up; | ||
| u16 status; | ||
| int port; | ||
| int err; | ||
|
|
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| chip = mpcs->chip; | ||
| port = mpcs->port; | ||
|
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| mv88e6xxx_reg_lock(chip); | ||
| err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &status); | ||
| mv88e6xxx_reg_unlock(chip); | ||
|
|
||
| if (!err) { | ||
| link_up = !!(status & MV88E6XXX_PORT_STS_LINK); | ||
|
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| phylink_pcs_change(&mpcs->phylink_pcs, link_up); | ||
|
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| ret = IRQ_HANDLED; | ||
| } | ||
|
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| return ret; | ||
| } | ||
|
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| static void mv88e6185_pcs_get_state(struct phylink_pcs *pcs, | ||
| struct phylink_link_state *state) | ||
| { | ||
| struct mv88e6185_pcs *mpcs = pcs_to_mv88e6185_pcs(pcs); | ||
| struct mv88e6xxx_chip *chip = mpcs->chip; | ||
| int port = mpcs->port; | ||
| u16 status; | ||
| int err; | ||
|
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| mv88e6xxx_reg_lock(chip); | ||
| err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &status); | ||
| mv88e6xxx_reg_unlock(chip); | ||
|
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| if (err) | ||
| status = 0; | ||
|
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| state->link = !!(status & MV88E6XXX_PORT_STS_LINK); | ||
| if (state->link) { | ||
| state->duplex = status & MV88E6XXX_PORT_STS_DUPLEX ? | ||
| DUPLEX_FULL : DUPLEX_HALF; | ||
|
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| switch (status & MV88E6XXX_PORT_STS_SPEED_MASK) { | ||
| case MV88E6XXX_PORT_STS_SPEED_1000: | ||
| state->speed = SPEED_1000; | ||
| break; | ||
|
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| case MV88E6XXX_PORT_STS_SPEED_100: | ||
| state->speed = SPEED_100; | ||
| break; | ||
|
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| case MV88E6XXX_PORT_STS_SPEED_10: | ||
| state->speed = SPEED_10; | ||
| break; | ||
|
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| default: | ||
| state->link = false; | ||
| break; | ||
| } | ||
| } | ||
| } | ||
|
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| static int mv88e6185_pcs_config(struct phylink_pcs *pcs, unsigned int mode, | ||
| phy_interface_t interface, | ||
| const unsigned long *advertising, | ||
| bool permit_pause_to_mac) | ||
| { | ||
| return 0; | ||
| } | ||
|
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| static void mv88e6185_pcs_an_restart(struct phylink_pcs *pcs) | ||
| { | ||
| } | ||
|
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| static const struct phylink_pcs_ops mv88e6185_phylink_pcs_ops = { | ||
| .pcs_get_state = mv88e6185_pcs_get_state, | ||
| .pcs_config = mv88e6185_pcs_config, | ||
| .pcs_an_restart = mv88e6185_pcs_an_restart, | ||
| }; | ||
|
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| static int mv88e6185_pcs_init(struct mv88e6xxx_chip *chip, int port) | ||
| { | ||
| struct mv88e6185_pcs *mpcs; | ||
| struct device *dev; | ||
| unsigned int irq; | ||
| int err; | ||
|
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| /* There are no configurable serdes lanes on this switch chip, so | ||
| * we use the static cmode configuration to determine whether we | ||
| * have a PCS or not. | ||
| */ | ||
| if (chip->ports[port].cmode != MV88E6185_PORT_STS_CMODE_SERDES && | ||
| chip->ports[port].cmode != MV88E6185_PORT_STS_CMODE_1000BASE_X) | ||
| return 0; | ||
|
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| dev = chip->dev; | ||
|
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| mpcs = kzalloc(sizeof(*mpcs), GFP_KERNEL); | ||
| if (!mpcs) | ||
| return -ENOMEM; | ||
|
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| mpcs->chip = chip; | ||
| mpcs->port = port; | ||
| mpcs->phylink_pcs.ops = &mv88e6185_phylink_pcs_ops; | ||
|
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| irq = mv88e6xxx_serdes_irq_mapping(chip, port); | ||
| if (irq) { | ||
| snprintf(mpcs->name, sizeof(mpcs->name), | ||
| "mv88e6xxx-%s-serdes-%d", dev_name(dev), port); | ||
|
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| err = request_threaded_irq(irq, NULL, mv88e6185_pcs_handle_irq, | ||
| IRQF_ONESHOT, mpcs->name, mpcs); | ||
| if (err) { | ||
| kfree(mpcs); | ||
| return err; | ||
| } | ||
|
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| mpcs->irq = irq; | ||
| } else { | ||
| mpcs->phylink_pcs.poll = true; | ||
| } | ||
|
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| chip->ports[port].pcs_private = &mpcs->phylink_pcs; | ||
|
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| return 0; | ||
| } | ||
|
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| static void mv88e6185_pcs_teardown(struct mv88e6xxx_chip *chip, int port) | ||
| { | ||
| struct mv88e6185_pcs *mpcs; | ||
|
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| mpcs = chip->ports[port].pcs_private; | ||
| if (!mpcs) | ||
| return; | ||
|
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| if (mpcs->irq) | ||
| free_irq(mpcs->irq, mpcs); | ||
|
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| kfree(mpcs); | ||
|
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| chip->ports[port].pcs_private = NULL; | ||
| } | ||
|
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| static struct phylink_pcs *mv88e6185_pcs_select(struct mv88e6xxx_chip *chip, | ||
| int port, | ||
| phy_interface_t interface) | ||
| { | ||
| return chip->ports[port].pcs_private; | ||
| } | ||
|
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| const struct mv88e6xxx_pcs_ops mv88e6185_pcs_ops = { | ||
| .pcs_init = mv88e6185_pcs_init, | ||
| .pcs_teardown = mv88e6185_pcs_teardown, | ||
| .pcs_select = mv88e6185_pcs_select, | ||
| }; |
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