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dt-bindings: display/msm: add missing device nodes to mdss-* schemas
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Add missing device nodes (DSI, PHYs, DP/eDP) to the existing MDSS
schemas.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/508391/
Link: https://lore.kernel.org/r/20221024164225.3236654-12-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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Dmitry Baryshkov committed Nov 2, 2022
1 parent 06097b1 commit 4b32e46
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153 changes: 153 additions & 0 deletions Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml
View file
Original file line number Diff line number Diff line change
Expand Up @@ -43,11 +43,24 @@ patternProperties:
compatible:
const: qcom,msm8998-dpu

"^dsi@[0-9a-f]+$":
type: object
properties:
compatible:
const: qcom,mdss-dsi-ctrl

"^phy@[0-9a-f]+$":
type: object
properties:
compatible:
const: qcom,dsi-phy-10nm-8998

unevaluatedProperties: false

examples:
- |
#include <dt-bindings/clock/qcom,mmcc-msm8998.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/qcom-rpmpd.h>
Expand Down Expand Up @@ -111,5 +124,145 @@ examples:
};
};
};
dsi@c994000 {
compatible = "qcom,mdss-dsi-ctrl";
reg = <0x0c994000 0x400>;
reg-names = "dsi_ctrl";
interrupt-parent = <&mdss>;
interrupts = <4>;
clocks = <&mmcc MDSS_BYTE0_CLK>,
<&mmcc MDSS_BYTE0_INTF_CLK>,
<&mmcc MDSS_PCLK0_CLK>,
<&mmcc MDSS_ESC0_CLK>,
<&mmcc MDSS_AHB_CLK>,
<&mmcc MDSS_AXI_CLK>;
clock-names = "byte",
"byte_intf",
"pixel",
"core",
"iface",
"bus";
assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;
assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmpd MSM8998_VDDCX>;
phys = <&dsi0_phy>;
phy-names = "dsi";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dsi0_in: endpoint {
remote-endpoint = <&dpu_intf1_out>;
};
};
port@1 {
reg = <1>;
dsi0_out: endpoint {
};
};
};
};
dsi0_phy: phy@c994400 {
compatible = "qcom,dsi-phy-10nm-8998";
reg = <0x0c994400 0x200>,
<0x0c994600 0x280>,
<0x0c994a00 0x1e0>;
reg-names = "dsi_phy",
"dsi_phy_lane",
"dsi_pll";
#clock-cells = <1>;
#phy-cells = <0>;
clocks = <&mmcc MDSS_AHB_CLK>,
<&rpmcc RPM_SMD_XO_CLK_SRC>;
clock-names = "iface", "ref";
vdds-supply = <&pm8998_l1>;
};
dsi@c996000 {
compatible = "qcom,mdss-dsi-ctrl";
reg = <0x0c996000 0x400>;
reg-names = "dsi_ctrl";
interrupt-parent = <&mdss>;
interrupts = <5>;
clocks = <&mmcc MDSS_BYTE1_CLK>,
<&mmcc MDSS_BYTE1_INTF_CLK>,
<&mmcc MDSS_PCLK1_CLK>,
<&mmcc MDSS_ESC1_CLK>,
<&mmcc MDSS_AHB_CLK>,
<&mmcc MDSS_AXI_CLK>;
clock-names = "byte",
"byte_intf",
"pixel",
"core",
"iface",
"bus";
assigned-clocks = <&mmcc BYTE1_CLK_SRC>, <&mmcc PCLK1_CLK_SRC>;
assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>;
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmpd MSM8998_VDDCX>;
phys = <&dsi1_phy>;
phy-names = "dsi";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dsi1_in: endpoint {
remote-endpoint = <&dpu_intf2_out>;
};
};
port@1 {
reg = <1>;
dsi1_out: endpoint {
};
};
};
};
dsi1_phy: phy@c996400 {
compatible = "qcom,dsi-phy-10nm-8998";
reg = <0x0c996400 0x200>,
<0x0c996600 0x280>,
<0x0c996a00 0x10e>;
reg-names = "dsi_phy",
"dsi_phy_lane",
"dsi_pll";
#clock-cells = <1>;
#phy-cells = <0>;
clocks = <&mmcc MDSS_AHB_CLK>,
<&rpmcc RPM_SMD_XO_CLK_SRC>;
clock-names = "iface", "ref";
vdds-supply = <&pm8998_l1>;
};
};
...
81 changes: 81 additions & 0 deletions Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml
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Original file line number Diff line number Diff line change
Expand Up @@ -49,12 +49,25 @@ patternProperties:
compatible:
const: qcom,qcm2290-dpu

"^dsi@[0-9a-f]+$":
type: object
properties:
compatible:
const: qcom,dsi-ctrl-6g-qcm2290

"^phy@[0-9a-f]+$":
type: object
properties:
compatible:
const: qcom,dsi-phy-14nm-2290

unevaluatedProperties: false

examples:
- |
#include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
#include <dt-bindings/clock/qcom,gcc-qcm2290.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interconnect/qcom,qcm2290.h>
#include <dt-bindings/power/qcom-rpmpd.h>
Expand Down Expand Up @@ -113,5 +126,73 @@ examples:
};
};
};
dsi@5e94000 {
compatible = "qcom,dsi-ctrl-6g-qcm2290";
reg = <0x05e94000 0x400>;
reg-names = "dsi_ctrl";
interrupt-parent = <&mdss>;
interrupts = <4>;
clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
<&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
<&dispcc DISP_CC_MDSS_PCLK0_CLK>,
<&dispcc DISP_CC_MDSS_ESC0_CLK>,
<&dispcc DISP_CC_MDSS_AHB_CLK>,
<&gcc GCC_DISP_HF_AXI_CLK>;
clock-names = "byte",
"byte_intf",
"pixel",
"core",
"iface",
"bus";
assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmpd QCM2290_VDDCX>;
phys = <&dsi0_phy>;
phy-names = "dsi";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dsi0_in: endpoint {
remote-endpoint = <&dpu_intf1_out>;
};
};
port@1 {
reg = <1>;
dsi0_out: endpoint {
};
};
};
};
dsi0_phy: phy@5e94400 {
compatible = "qcom,dsi-phy-14nm-2290";
reg = <0x05e94400 0x100>,
<0x05e94500 0x300>,
<0x05e94800 0x188>;
reg-names = "dsi_phy",
"dsi_phy_lane",
"dsi_pll";
#clock-cells = <1>;
#phy-cells = <0>;
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>;
clock-names = "iface", "ref";
vcca-supply = <&vreg_dsi_phy>;
};
};
...
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