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powerpc/book3s64/kexec: Clear CIABR on kexec
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The value in CIABR persists across kexec which can lead to unintended
results when the new kernel hits the old kernel's breakpoint. For
example:

0:mon> bi $loadavg_proc_show
0:mon> b
   type            address
1 inst   c000000000519060  loadavg_proc_show+0x0/0x130
0:mon> x

$ kexec -l /mnt/vmlinux --initrd=/mnt/rootfs.cpio.gz --append='xmon=off'
$ kexec -e

$ cat /proc/loadavg
Trace/breakpoint trap

Make sure CIABR is cleared so this does not happen.

Signed-off-by: Jordan Niethe <jniethe5@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20201207010519.15597-1-jniethe5@gmail.com
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Jordan Niethe authored and Michael Ellerman committed Dec 7, 2020
1 parent 8817aab commit 4bb3219
Showing 1 changed file with 5 additions and 0 deletions.
5 changes: 5 additions & 0 deletions arch/powerpc/include/asm/book3s/64/kexec.h
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,7 @@
#ifndef _ASM_POWERPC_BOOK3S_64_KEXEC_H_
#define _ASM_POWERPC_BOOK3S_64_KEXEC_H_

#include <asm/plpar_wrappers.h>

#define reset_sprs reset_sprs
static inline void reset_sprs(void)
Expand All @@ -14,6 +15,10 @@ static inline void reset_sprs(void)

if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
mtspr(SPRN_IAMR, 0);
if (cpu_has_feature(CPU_FTR_HVMODE))
mtspr(SPRN_CIABR, 0);
else
plpar_set_ciabr(0);
}

/* Do we need isync()? We are going via a kexec reset */
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