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Merge branch 'linus' into x86/asm, to refresh the topic tree with fixes
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Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Ingo Molnar committed Mar 23, 2017
2 parents f25d384 + 093b995 commit 4ccb6ae
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4 changes: 2 additions & 2 deletions Documentation/DocBook/Makefile
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Expand Up @@ -7,12 +7,12 @@
# list of DOCBOOKS.

DOCBOOKS := z8530book.xml \
kernel-hacking.xml kernel-locking.xml deviceiobook.xml \
kernel-hacking.xml kernel-locking.xml \
writing_usb_driver.xml networking.xml \
kernel-api.xml filesystems.xml lsm.xml kgdb.xml \
gadget.xml libata.xml mtdnand.xml librs.xml rapidio.xml \
genericirq.xml s390-drivers.xml scsi.xml \
sh.xml regulator.xml w1.xml \
sh.xml w1.xml \
writing_musb_glue_layer.xml

ifeq ($(DOCBOOKS),)
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2 changes: 1 addition & 1 deletion Documentation/PCI/pcieaer-howto.txt
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Expand Up @@ -256,7 +256,7 @@ After reboot with new kernel or insert the module, a device file named

Then, you need a user space tool named aer-inject, which can be gotten
from:
http://www.kernel.org/pub/linux/utils/pci/aer-inject/
https://git.kernel.org/cgit/linux/kernel/git/gong.chen/aer-inject.git/

More information about aer-inject can be found in the document comes
with its source code.
9 changes: 9 additions & 0 deletions Documentation/admin-guide/kernel-parameters.txt
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Expand Up @@ -653,6 +653,9 @@
cpuidle.off=1 [CPU_IDLE]
disable the cpuidle sub-system

cpufreq.off=1 [CPU_FREQ]
disable the cpufreq sub-system

cpu_init_udelay=N
[X86] Delay for N microsec between assert and de-assert
of APIC INIT to start processors. This delay occurs
Expand Down Expand Up @@ -1183,6 +1186,12 @@
functions that can be changed at run time by the
set_graph_notrace file in the debugfs tracing directory.

ftrace_graph_max_depth=<uint>
[FTRACE] Used with the function graph tracer. This is
the max depth it will trace into a function. This value
can be changed at run time by the max_graph_depth file
in the tracefs tracing directory. default: 0 (no limit)

gamecon.map[2|3]=
[HW,JOY] Multisystem joystick and NES/SNES/PSX pad
support via parallel port (up to 5 devices per port)
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1 change: 1 addition & 0 deletions Documentation/arm64/silicon-errata.txt
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Expand Up @@ -68,3 +68,4 @@ stable kernels.
| | | | |
| Qualcomm Tech. | Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 |
| Qualcomm Tech. | Falkor v1 | E1009 | QCOM_FALKOR_ERRATUM_1009 |
| Qualcomm Tech. | QDF2400 ITS | E0065 | QCOM_QDF2400_ERRATUM_0065 |
11 changes: 6 additions & 5 deletions Documentation/cgroup-v2.txt
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Expand Up @@ -1142,16 +1142,17 @@ used by the kernel.

pids.max

A read-write single value file which exists on non-root cgroups. The
default is "max".
A read-write single value file which exists on non-root
cgroups. The default is "max".

Hard limit of number of processes.
Hard limit of number of processes.

pids.current

A read-only single value file which exists on all cgroups.
A read-only single value file which exists on all cgroups.

The number of processes currently in the cgroup and its descendants.
The number of processes currently in the cgroup and its
descendants.

Organisational operations are not blocked by cgroup policies, so it is
possible to have pids.current > pids.max. This can be done by either
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2 changes: 1 addition & 1 deletion Documentation/conf.py
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Expand Up @@ -135,7 +135,7 @@
# If true, `todo` and `todoList` produce output, else they produce nothing.
todo_include_todos = False

primary_domain = 'C'
primary_domain = 'c'
highlight_language = 'none'

# -- Options for HTML output ----------------------------------------------
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2 changes: 1 addition & 1 deletion Documentation/dev-tools/kcov.rst
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Expand Up @@ -10,7 +10,7 @@ Note that kcov does not aim to collect as much coverage as possible. It aims
to collect more or less stable coverage that is function of syscall inputs.
To achieve this goal it does not collect coverage in soft/hard interrupts
and instrumentation of some inherently non-deterministic parts of kernel is
disbled (e.g. scheduler, locking).
disabled (e.g. scheduler, locking).

Usage
-----
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2 changes: 2 additions & 0 deletions Documentation/devicetree/bindings/arm/amlogic.txt
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Expand Up @@ -40,6 +40,8 @@ Board compatible values:
- "hardkernel,odroid-c2" (Meson gxbb)
- "amlogic,p200" (Meson gxbb)
- "amlogic,p201" (Meson gxbb)
- "wetek,hub" (Meson gxbb)
- "wetek,play2" (Meson gxbb)
- "amlogic,p212" (Meson gxl s905x)
- "amlogic,p230" (Meson gxl s905d)
- "amlogic,p231" (Meson gxl s905d)
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44 changes: 22 additions & 22 deletions Documentation/devicetree/bindings/opp/opp.txt
Original file line number Diff line number Diff line change
Expand Up @@ -188,14 +188,14 @@ Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states together.

opp@1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <970000 975000 985000>;
opp-microvolt = <975000 970000 985000>;
opp-microamp = <70000>;
clock-latency-ns = <300000>;
opp-suspend;
};
opp@1100000000 {
opp-hz = /bits/ 64 <1100000000>;
opp-microvolt = <980000 1000000 1010000>;
opp-microvolt = <1000000 980000 1010000>;
opp-microamp = <80000>;
clock-latency-ns = <310000>;
};
Expand Down Expand Up @@ -267,14 +267,14 @@ independently.

opp@1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <970000 975000 985000>;
opp-microvolt = <975000 970000 985000>;
opp-microamp = <70000>;
clock-latency-ns = <300000>;
opp-suspend;
};
opp@1100000000 {
opp-hz = /bits/ 64 <1100000000>;
opp-microvolt = <980000 1000000 1010000>;
opp-microvolt = <1000000 980000 1010000>;
opp-microamp = <80000>;
clock-latency-ns = <310000>;
};
Expand Down Expand Up @@ -343,14 +343,14 @@ DVFS state together.

opp@1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <970000 975000 985000>;
opp-microvolt = <975000 970000 985000>;
opp-microamp = <70000>;
clock-latency-ns = <300000>;
opp-suspend;
};
opp@1100000000 {
opp-hz = /bits/ 64 <1100000000>;
opp-microvolt = <980000 1000000 1010000>;
opp-microvolt = <1000000 980000 1010000>;
opp-microamp = <80000>;
clock-latency-ns = <310000>;
};
Expand All @@ -369,7 +369,7 @@ DVFS state together.

opp@1300000000 {
opp-hz = /bits/ 64 <1300000000>;
opp-microvolt = <1045000 1050000 1055000>;
opp-microvolt = <1050000 1045000 1055000>;
opp-microamp = <95000>;
clock-latency-ns = <400000>;
opp-suspend;
Expand All @@ -382,7 +382,7 @@ DVFS state together.
};
opp@1500000000 {
opp-hz = /bits/ 64 <1500000000>;
opp-microvolt = <1010000 1100000 1110000>;
opp-microvolt = <1100000 1010000 1110000>;
opp-microamp = <95000>;
clock-latency-ns = <400000>;
turbo-mode;
Expand Down Expand Up @@ -424,9 +424,9 @@ Example 4: Handling multiple regulators

opp@1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <970000 975000 985000>, /* Supply 0 */
<960000 965000 975000>, /* Supply 1 */
<960000 965000 975000>; /* Supply 2 */
opp-microvolt = <975000 970000 985000>, /* Supply 0 */
<965000 960000 975000>, /* Supply 1 */
<965000 960000 975000>; /* Supply 2 */
opp-microamp = <70000>, /* Supply 0 */
<70000>, /* Supply 1 */
<70000>; /* Supply 2 */
Expand All @@ -437,9 +437,9 @@ Example 4: Handling multiple regulators

opp@1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <970000 975000 985000>, /* Supply 0 */
<960000 965000 975000>, /* Supply 1 */
<960000 965000 975000>; /* Supply 2 */
opp-microvolt = <975000 970000 985000>, /* Supply 0 */
<965000 960000 975000>, /* Supply 1 */
<965000 960000 975000>; /* Supply 2 */
opp-microamp = <70000>, /* Supply 0 */
<0>, /* Supply 1 doesn't need this */
<70000>; /* Supply 2 */
Expand Down Expand Up @@ -474,7 +474,7 @@ Example 5: opp-supported-hw
*/
opp-supported-hw = <0xF 0xFFFFFFFF 0xFFFFFFFF>
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <900000 915000 925000>;
opp-microvolt = <915000 900000 925000>;
...
};

Expand All @@ -487,7 +487,7 @@ Example 5: opp-supported-hw
*/
opp-supported-hw = <0x20 0xff0000ff 0x0000f4f0>
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <900000 915000 925000>;
opp-microvolt = <915000 900000 925000>;
...
};
};
Expand All @@ -512,18 +512,18 @@ Example 6: opp-microvolt-<name>, opp-microamp-<name>:

opp@1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt-slow = <900000 915000 925000>;
opp-microvolt-fast = <970000 975000 985000>;
opp-microvolt-slow = <915000 900000 925000>;
opp-microvolt-fast = <975000 970000 985000>;
opp-microamp-slow = <70000>;
opp-microamp-fast = <71000>;
};

opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt-slow = <900000 915000 925000>, /* Supply vcc0 */
<910000 925000 935000>; /* Supply vcc1 */
opp-microvolt-fast = <970000 975000 985000>, /* Supply vcc0 */
<960000 965000 975000>; /* Supply vcc1 */
opp-microvolt-slow = <915000 900000 925000>, /* Supply vcc0 */
<925000 910000 935000>; /* Supply vcc1 */
opp-microvolt-fast = <975000 970000 985000>, /* Supply vcc0 */
<965000 960000 975000>; /* Supply vcc1 */
opp-microamp = <70000>; /* Will be used for both slow/fast */
};
};
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62 changes: 60 additions & 2 deletions Documentation/devicetree/bindings/powerpc/4xx/emac.txt
Original file line number Diff line number Diff line change
Expand Up @@ -71,6 +71,9 @@
For Axon it can be absent, though my current driver
doesn't handle phy-address yet so for now, keep
0x00ffffff in it.
- phy-handle : Used to describe configurations where a external PHY
is used. Please refer to:
Documentation/devicetree/bindings/net/ethernet.txt
- rx-fifo-size-gige : 1 cell, Rx fifo size in bytes for 1000 Mb/sec
operations (if absent the value is the same as
rx-fifo-size). For Axon, either absent or 2048.
Expand All @@ -81,8 +84,22 @@
offload, phandle of the TAH device node.
- tah-channel : 1 cell, optional. If appropriate, channel used on the
TAH engine.
- fixed-link : Fixed-link subnode describing a link to a non-MDIO
managed entity. See
Documentation/devicetree/bindings/net/fixed-link.txt
for details.
- mdio subnode : When the EMAC has a phy connected to its local
mdio, which us supported by the kernel's network
PHY library in drivers/net/phy, there must be device
tree subnode with the following required properties:
- #address-cells: Must be <1>.
- #size-cells: Must be <0>.

Example:
For PHY definitions: Please refer to
Documentation/devicetree/bindings/net/phy.txt and
Documentation/devicetree/bindings/net/ethernet.txt

Examples:

EMAC0: ethernet@40000800 {
device_type = "network";
Expand All @@ -104,6 +121,48 @@
zmii-channel = <0>;
};

EMAC1: ethernet@ef600c00 {
device_type = "network";
compatible = "ibm,emac-apm821xx", "ibm,emac4sync";
interrupt-parent = <&EMAC1>;
interrupts = <0 1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = <0 &UIC2 0x10 IRQ_TYPE_LEVEL_HIGH /* Status */
1 &UIC2 0x14 IRQ_TYPE_LEVEL_HIGH /* Wake */>;
reg = <0xef600c00 0x000000c4>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <9000>;
rx-fifo-size = <16384>;
tx-fifo-size = <2048>;
fifo-entry-size = <10>;
phy-mode = "rgmii";
phy-handle = <&phy0>;
phy-map = <0x00000000>;
rgmii-device = <&RGMII0>;
rgmii-channel = <0>;
tah-device = <&TAH0>;
tah-channel = <0>;
has-inverted-stacr-oc;
has-new-stacr-staopc;

mdio {
#address-cells = <1>;
#size-cells = <0>;

phy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
};
};


ii) McMAL node

Required properties:
Expand Down Expand Up @@ -145,4 +204,3 @@
- revision : as provided by the RGMII new version register if
available.
For Axon: 0x0000012a

6 changes: 3 additions & 3 deletions Documentation/devicetree/bindings/pwm/imx-pwm.txt
Original file line number Diff line number Diff line change
Expand Up @@ -6,8 +6,8 @@ Required properties:
- "fsl,imx1-pwm" for PWM compatible with the one integrated on i.MX1
- "fsl,imx27-pwm" for PWM compatible with the one integrated on i.MX27
- reg: physical base address and length of the controller's registers
- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
the cells format.
- #pwm-cells: 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See pwm.txt
in this directory for a description of the cells format.
- clocks : Clock specifiers for both ipg and per clocks.
- clock-names : Clock names should include both "ipg" and "per"
See the clock consumer binding,
Expand All @@ -17,7 +17,7 @@ See the clock consumer binding,
Example:

pwm1: pwm@53fb4000 {
#pwm-cells = <2>;
#pwm-cells = <3>;
compatible = "fsl,imx53-pwm", "fsl,imx27-pwm";
reg = <0x53fb4000 0x4000>;
clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -45,7 +45,7 @@ Required Properties:
Optional Properties:
- reg-names: In addition to the required properties, the following are optional
- "efuse-address" - Contains efuse base address used to pick up ABB info.
- "ldo-address" - Contains address of ABB LDO overide register address.
- "ldo-address" - Contains address of ABB LDO override register.
"efuse-address" is required for this.
- ti,ldovbb-vset-mask - Required if ldo-address is set, mask for LDO override
register to provide override vset value.
Expand Down
7 changes: 7 additions & 0 deletions Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,12 @@ Required properties:
calibration data, as specified by the SoC reference manual.
The first cell of each pair is the value to be written to TTCFGR,
and the second is the value to be written to TSCFGR.
- #thermal-sensor-cells : Must be 1. The sensor specifier is the monitoring
site ID, and represents the "n" in TRITSRn and TRATSRn.

Optional property:
- little-endian : If present, the TMU registers are little endian. If absent,
the default is big endian.

Example:

Expand Down Expand Up @@ -60,4 +66,5 @@ tmu@f0000 {

0x00030000 0x00000012
0x00030001 0x0000001d>;
#thermal-sensor-cells = <1>;
};
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