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arm64: dts: imx93-var-som: Add Variscite VAR-SOM-MX93
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Add DTSI for Variscite VAR-SOM-MX93 System on Module and DTS for Variscite
VAR-SOM-MX93 on Symphony evaluation board.

This version comes with:
- NXP i.MX 93 Dual, 1.7GHz, Cortex-A55 + Cortex-M33
- 2 GB of RAM
- 16GB eMMC
- 802.11ax/ac/a/b/g/n WiFi with 5.3 Bluetooth
- CAN bus
- Audio codec

Signed-off-by: Mathieu Othacehe <othacehe@gnu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Mathieu Othacehe authored and Shawn Guo committed Feb 5, 2024
1 parent 2cc2363 commit 4ce623d
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1 change: 1 addition & 0 deletions arch/arm64/boot/dts/freescale/Makefile
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Expand Up @@ -205,6 +205,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-11x11-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxca.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-var-som-symphony.dtb

imx8mm-venice-gw72xx-0x-imx219-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-imx219.dtbo
imx8mm-venice-gw72xx-0x-rpidsi-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-rpidsi.dtbo
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351 changes: 351 additions & 0 deletions arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2021 NXP
* Copyright 2023 Variscite Ltd.
*/

/dts-v1/;

#include <dt-bindings/leds/common.h>
#include "imx93-var-som.dtsi"

/{
model = "Variscite VAR-SOM-MX93 on Symphony evaluation board";
compatible = "variscite,var-som-mx93-symphony",
"variscite,var-som-mx93", "fsl,imx93";

aliases {
ethernet0 = &eqos;
ethernet1 = &fec;
};

chosen {
stdout-path = &lpuart1;
};

/*
* Needed only for Symphony <= v1.5
*/
reg_fec_phy: regulator-fec-phy {
compatible = "regulator-fixed";
regulator-name = "fec-phy";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-enable-ramp-delay = <20000>;
gpio = <&pca9534 7 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};

reg_usdhc2_vmmc: regulator-usdhc2 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
regulator-name = "VSD_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio2 18 GPIO_ACTIVE_HIGH>;
off-on-delay-us = <20000>;
enable-active-high;
};

reg_vref_1v8: regulator-adc-vref {
compatible = "regulator-fixed";
regulator-name = "vref_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};

reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;

ethosu_mem: ethosu-region@88000000 {
compatible = "shared-dma-pool";
reusable;
reg = <0x0 0x88000000 0x0 0x8000000>;
};

vdev0vring0: vdev0vring0@87ee0000 {
reg = <0 0x87ee0000 0 0x8000>;
no-map;
};

vdev0vring1: vdev0vring1@87ee8000 {
reg = <0 0x87ee8000 0 0x8000>;
no-map;
};

vdev1vring0: vdev1vring0@87ef0000 {
reg = <0 0x87ef0000 0 0x8000>;
no-map;
};

vdev1vring1: vdev1vring1@87ef8000 {
reg = <0 0x87ef8000 0 0x8000>;
no-map;
};

rsc_table: rsc-table@2021f000 {
reg = <0 0x2021f000 0 0x1000>;
no-map;
};

vdevbuffer: vdevbuffer@87f00000 {
compatible = "shared-dma-pool";
reg = <0 0x87f00000 0 0x100000>;
no-map;
};

ele_reserved: ele-reserved@87de0000 {
compatible = "shared-dma-pool";
reg = <0 0x87de0000 0 0x100000>;
no-map;
};
};

gpio-keys {
compatible = "gpio-keys";

key-back {
label = "Back";
gpios = <&pca9534 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_BACK>;
};

key-home {
label = "Home";
gpios = <&pca9534 2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOME>;
};

key-menu {
label = "Menu";
gpios = <&pca9534 3 GPIO_ACTIVE_LOW>;
linux,code = <KEY_MENU>;
};
};

leds {
compatible = "gpio-leds";

led-0 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pca9534 0 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
};

/* Use external instead of internal RTC*/
&bbnsm_rtc {
status = "disabled";
};

&eqos {
mdio {
ethphy1: ethernet-phy@5 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <5>;
qca,disable-smarteee;
eee-broken-1000t;
reset-gpios = <&pca9534 5 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <20000>;
vddio-supply = <&vddio1>;

vddio1: vddio-regulator {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
};
};
};

&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-mode = "rgmii";
phy-handle = <&ethphy1>;
phy-supply = <&reg_fec_phy>;
status = "okay";
};

&flexcan1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>;
status = "okay";
};

&lpi2c1 {
clock-frequency = <400000>;
pinctrl-names = "default", "sleep", "gpio";
pinctrl-0 = <&pinctrl_lpi2c1>;
pinctrl-1 = <&pinctrl_lpi2c1_gpio>;
pinctrl-2 = <&pinctrl_lpi2c1_gpio>;
scl-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
status = "okay";

/* DS1337 RTC module */
rtc@68 {
compatible = "dallas,ds1337";
reg = <0x68>;
};
};

&lpi2c5 {
clock-frequency = <400000>;
pinctrl-names = "default", "sleep", "gpio";
pinctrl-0 = <&pinctrl_lpi2c5>;
pinctrl-1 = <&pinctrl_lpi2c5_gpio>;
pinctrl-2 = <&pinctrl_lpi2c5_gpio>;
scl-gpios = <&gpio2 23 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
status = "okay";

pca9534: gpio@20 {
compatible = "nxp,pca9534";
reg = <0x20>;
gpio-controller;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pca9534>;
interrupt-parent = <&gpio3>;
interrupts = <26 IRQ_TYPE_EDGE_FALLING>;
#gpio-cells = <2>;
wakeup-source;
};
};

/* Console */
&lpuart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};

/* J18.7, J18.9 */
&lpuart6 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart6>;
status = "okay";
};

/* SD */
&usdhc2 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>;
vmmc-supply = <&reg_usdhc2_vmmc>;
bus-width = <4>;
status = "okay";
no-sdio;
no-mmc;
};

/* Watchdog */
&wdog3 {
status = "okay";
};

&iomuxc {
pinctrl_fec: fecgrp {
fsl,pins = <
MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x57e
MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x57e
MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x57e
MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x57e
MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x5fe
MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e
MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x57e
MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x57e
MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x57e
MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x57e
MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x5fe
MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e
>;
};

pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX93_PAD_PDM_CLK__CAN1_TX 0x139e
MX93_PAD_PDM_BIT_STREAM0__CAN1_RX 0x139e
>;
};

pinctrl_lpi2c1: lpi2c1grp {
fsl,pins = <
MX93_PAD_I2C1_SCL__LPI2C1_SCL 0x40000b9e
MX93_PAD_I2C1_SDA__LPI2C1_SDA 0x40000b9e
>;
};

pinctrl_lpi2c1_gpio: lpi2c1gpiogrp {
fsl,pins = <
MX93_PAD_I2C1_SCL__GPIO1_IO00 0x31e
MX93_PAD_I2C1_SDA__GPIO1_IO01 0x31e
>;
};

pinctrl_lpi2c5: lpi2c5grp {
fsl,pins = <
MX93_PAD_GPIO_IO23__LPI2C5_SCL 0x40000b9e
MX93_PAD_GPIO_IO22__LPI2C5_SDA 0x40000b9e
>;
};

pinctrl_lpi2c5_gpio: lpi2c5gpiogrp {
fsl,pins = <
MX93_PAD_GPIO_IO23__GPIO2_IO23 0x31e
MX93_PAD_GPIO_IO22__GPIO2_IO22 0x31e
>;
};

pinctrl_pca9534: pca9534grp {
fsl,pins = <
MX93_PAD_CCM_CLKO1__GPIO3_IO26 0x31e
>;
};

pinctrl_uart1: uart1grp {
fsl,pins = <
MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
MX93_PAD_UART1_TXD__LPUART1_TX 0x31e
>;
};

pinctrl_uart6: uart6grp {
fsl,pins = <
MX93_PAD_GPIO_IO05__LPUART6_RX 0x31e
MX93_PAD_GPIO_IO04__LPUART6_TX 0x31e
>;
};

pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
fsl,pins = <
MX93_PAD_GPIO_IO18__GPIO2_IO18 0x31e
>;
};

pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe
MX93_PAD_SD2_CMD__USDHC2_CMD 0x13fe
MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x13fe
MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x13fe
MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x13fe
MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe
MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
>;
};

pinctrl_usdhc2_gpio: usdhc2gpiogrp {
fsl,pins = <
MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
>;
};
};
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