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Merge tag 'devicetree-for-5.17' of git://git.kernel.org/pub/scm/linux…
…/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"Bindings:
- DT schema conversions for Samsung clocks, RNG bindings, Qcom
Command DB and rmtfs, gpio-restart, i2c-mux-gpio, i2c-mux-pinctl,
Tegra I2C and BPMP, pwm-vibrator, Arm DSU, and Cadence macb
- DT schema conversions for Broadcom platforms: interrupt
controllers, STB GPIO, STB waketimer, STB reset, iProc MDIO mux,
iProc PCIe, Cygnus PCIe PHY, PWM, USB BDC, BCM6328 LEDs, TMON,
SYSTEMPORT, AMAC, Northstar 2 PCIe PHY, GENET, moca PHY, GISB
arbiter, and SATA
- Add binding schemas for Tegra210 EMC table, TI DC-DC converters,
- Clean-ups of MDIO bus schemas to fix 'unevaluatedProperties' issues
- More fixes due to 'unevaluatedProperties' enabling
- Data type fixes and clean-ups of binding examples found in
preparation to move to validating DTB files directly (instead of
intermediate YAML representation.
- Vendor prefixes for T-Head Semiconductor, OnePlus, and Sunplus
- Add various new compatible strings
DT core:
- Silence a warning for overlapping reserved memory regions
- Reimplement unittest overlay tracking
- Fix stack frame size warning in unittest
- Clean-ups of early FDT scanning functions
- Fix handling of "linux,usable-memory-range" on EFI booted systems
- Add support for 'fail' status on CPU nodes
- Improve error message in of_phandle_iterator_next()
- kbuild: Disable duplicate unit-address warnings for disabled nodes"
* tag 'devicetree-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (114 commits)
dt-bindings: net: mdio: Drop resets/reset-names child properties
dt-bindings: clock: samsung: convert S5Pv210 to dtschema
dt-bindings: clock: samsung: convert Exynos5410 to dtschema
dt-bindings: clock: samsung: convert Exynos5260 to dtschema
dt-bindings: clock: samsung: extend Exynos7 bindings with UFS
dt-bindings: clock: samsung: convert Exynos7 to dtschema
dt-bindings: clock: samsung: convert Exynos5433 to dtschema
dt-bindings: i2c: maxim,max96712: Add bindings for Maxim Integrated MAX96712
dt-bindings: iio: adi,ltc2983: Fix 64-bit property sizes
dt-bindings: power: maxim,max17040: Fix incorrect type for 'maxim,rcomp'
dt-bindings: interrupt-controller: arm,gic-v3: Fix 'interrupts' cell size in example
dt-bindings: iio/magnetometer: yamaha,yas530: Fix invalid 'interrupts' in example
dt-bindings: clock: imx5: Drop clock consumer node from example
dt-bindings: Drop required 'interrupt-parent'
dt-bindings: net: ti,dp83869: Drop value on boolean 'ti,max-output-impedance'
dt-bindings: net: wireless: mt76: Fix 8-bit property sizes
dt-bindings: PCI: snps,dw-pcie-ep: Drop conflicting 'max-functions' schema
dt-bindings: i2c: st,stm32-i2c: Make each example a separate entry
dt-bindings: net: stm32-dwmac: Make each example a separate entry
dt-bindings: net: Cleanup MDIO node schemas
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,90 @@ | ||
| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
| %YAML 1.2 | ||
| --- | ||
| $id: http://devicetree.org/schemas/ata/brcm,sata-brcm.yaml# | ||
| $schema: http://devicetree.org/meta-schemas/core.yaml# | ||
|
|
||
| title: Broadcom SATA3 AHCI Controller | ||
|
|
||
| description: | ||
| SATA nodes are defined to describe on-chip Serial ATA controllers. | ||
| Each SATA controller should have its own node. | ||
|
|
||
| maintainers: | ||
| - Florian Fainelli <f.fainelli@gmail.com> | ||
|
|
||
| allOf: | ||
| - $ref: sata-common.yaml# | ||
|
|
||
| properties: | ||
| compatible: | ||
| oneOf: | ||
| - items: | ||
| - enum: | ||
| - brcm,bcm7216-ahci | ||
| - brcm,bcm7445-ahci | ||
| - brcm,bcm7425-ahci | ||
| - brcm,bcm63138-ahci | ||
| - const: brcm,sata3-ahci | ||
| - items: | ||
| - const: brcm,bcm-nsp-ahci | ||
|
|
||
| reg: | ||
| minItems: 2 | ||
| maxItems: 2 | ||
|
|
||
| reg-names: | ||
| items: | ||
| - const: ahci | ||
| - const: top-ctrl | ||
|
|
||
| interrupts: | ||
| maxItems: 1 | ||
|
|
||
| dma-coherent: true | ||
|
|
||
| if: | ||
| properties: | ||
| compatible: | ||
| contains: | ||
| enum: | ||
| - brcm,bcm7216-ahci | ||
| - brcm,bcm63138-ahci | ||
| then: | ||
| properties: | ||
| resets: | ||
| maxItems: 1 | ||
| reset-names: | ||
| enum: | ||
| - rescal | ||
| - ahci | ||
|
|
||
| required: | ||
| - compatible | ||
| - reg | ||
| - interrupts | ||
| - "#address-cells" | ||
| - "#size-cells" | ||
|
|
||
| unevaluatedProperties: false | ||
|
|
||
| examples: | ||
| - | | ||
| sata@f045a000 { | ||
| compatible = "brcm,bcm7445-ahci", "brcm,sata3-ahci"; | ||
| reg = <0xf045a000 0xa9c>, <0xf0458040 0x24>; | ||
| reg-names = "ahci", "top-ctrl"; | ||
| interrupts = <0 30 0>; | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
| sata0: sata-port@0 { | ||
| reg = <0>; | ||
| phys = <&sata_phy 0>; | ||
| }; | ||
| sata1: sata-port@1 { | ||
| reg = <1>; | ||
| phys = <&sata_phy 1>; | ||
| }; | ||
| }; |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,66 @@ | ||
| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
| %YAML 1.2 | ||
| --- | ||
| $id: http://devicetree.org/schemas/bus/brcm,gisb-arb.yaml# | ||
| $schema: http://devicetree.org/meta-schemas/core.yaml# | ||
|
|
||
| title: Broadcom GISB bus Arbiter controller | ||
|
|
||
| maintainers: | ||
| - Florian Fainelli <f.fainelli@gmail.com> | ||
|
|
||
| properties: | ||
| compatible: | ||
| oneOf: | ||
| - items: | ||
| - enum: | ||
| - brcm,bcm7445-gisb-arb # for other 28nm chips | ||
| - const: brcm,gisb-arb | ||
| - items: | ||
| - enum: | ||
| - brcm,bcm7278-gisb-arb # for V7 28nm chips | ||
| - brcm,bcm7435-gisb-arb # for newer 40nm chips | ||
| - brcm,bcm7400-gisb-arb # for older 40nm chips and all 65nm chips | ||
| - brcm,bcm7038-gisb-arb # for 130nm chips | ||
| - brcm,gisb-arb # fallback compatible | ||
|
|
||
| reg: | ||
| maxItems: 1 | ||
|
|
||
| interrupts: | ||
| minItems: 2 | ||
| items: | ||
| - description: timeout interrupt line | ||
| - description: target abort interrupt line | ||
| - description: breakpoint interrupt line | ||
|
|
||
| brcm,gisb-arb-master-mask: | ||
| $ref: /schemas/types.yaml#/definitions/uint32 | ||
| description: > | ||
| 32-bits wide bitmask used to specify which GISB masters are valid at the | ||
| system level | ||
| brcm,gisb-arb-master-names: | ||
| $ref: /schemas/types.yaml#/definitions/string-array | ||
| description: > | ||
| String list of the litteral name of the GISB masters. Should match the | ||
| number of bits set in brcm,gisb-master-mask and the order in which they | ||
| appear from MSB to LSB. | ||
| required: | ||
| - compatible | ||
| - reg | ||
| - interrupts | ||
|
|
||
| additionalProperties: false | ||
|
|
||
| examples: | ||
| - | | ||
| gisb-arb@f0400000 { | ||
| compatible = "brcm,gisb-arb"; | ||
| reg = <0xf0400000 0x800>; | ||
| interrupts = <0>, <2>; | ||
| interrupt-parent = <&sun_l2_intc>; | ||
| brcm,gisb-arb-master-mask = <0x7>; | ||
| brcm,gisb-arb-master-names = "bsp_0", "scpu_0", "cpu_0"; | ||
| }; |
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