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Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/…
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…git/soc/soc

Pull ARM SoC late updates from Olof Johansson:
 "This is some material that we picked up into our tree late, or that
  had more complex dependencies on more than one topic branch that makes
  sense to keep separately.

   - TI support for secure accelerators and hwrng on OMAP4/5

   - TI camera changes for dra7 and am437x and SGX improvement due to
     better reset control support on am335x, am437x and dra7

   - Davinci moves to proper clocksource on DM365, and regulator/audio
     improvements for DM365 and DM644x eval boards"

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (32 commits)
  ARM: dts: omap4-droid4: Enable hdq for droid4 ds250x 1-wire battery nvmem
  ARM: dts: motorola-cpcap-mapphone: Configure calibration interrupt
  ARM: dts: Configure interconnect target module for am437x sgx
  ARM: dts: Configure sgx for dra7
  ARM: dts: Configure rstctrl reset for am335x SGX
  ARM: dts: dra7: Add ti-sysc node for VPE
  ARM: dts: dra7: add vpe clkctrl node
  ARM: dts: am43x-epos-evm: Add VPFE and OV2659 entries
  ARM: dts: am437x-sk-evm: Add VPFE and OV2659 entries
  ARM: dts: am43xx: add support for clkout1 clock
  arm: dts: dra76-evm: Add CAL and OV5640 nodes
  arm: dtsi: dra76x: Add CAL dtsi node
  arm: dts: dra72-evm-common: Add entries for the CSI2 cameras
  ARM: dts: DRA72: Add CAL dtsi node
  ARM: dts: dra7-l4: Add ti-sysc node for CAM
  ARM: OMAP: DRA7xx: Make CAM clock domain SWSUP only
  ARM: dts: dra7: add cam clkctrl node
  ARM: OMAP2+: Drop legacy platform data for omap4 des
  ARM: OMAP2+: Drop legacy platform data for omap4 sham
  ARM: OMAP2+: Drop legacy platform data for omap4 aes
  ...
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Linus Torvalds committed Feb 8, 2020
2 parents 5939224 + a832eb2 commit 4ef1a30
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Showing 35 changed files with 697 additions and 675 deletions.
25 changes: 25 additions & 0 deletions arch/arm/boot/dts/am33xx.dtsi
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Expand Up @@ -496,6 +496,31 @@
dma-names = "tx", "rx";
};
};

target-module@56000000 {
compatible = "ti,sysc-omap4", "ti,sysc";
reg = <0x5600fe00 0x4>,
<0x5600fe10 0x4>;
reg-names = "rev", "sysc";
ti,sysc-midle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
clocks = <&gfx_l3_clkctrl AM3_GFX_L3_GFX_CLKCTRL 0>;
clock-names = "fck";
resets = <&prm_gfx 0>;
reset-names = "rstctrl";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x56000000 0x1000000>;

/*
* Closed source PowerVR driver, no child device
* binding or driver in mainline
*/
};
};
};

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20 changes: 20 additions & 0 deletions arch/arm/boot/dts/am4372.dtsi
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Expand Up @@ -445,6 +445,26 @@
pool;
};
};

target-module@56000000 {
compatible = "ti,sysc-omap4", "ti,sysc";
reg = <0x5600fe00 0x4>,
<0x5600fe10 0x4>;
reg-names = "rev", "sysc";
ti,sysc-midle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
clocks = <&gfx_l3_clkctrl AM4_GFX_L3_GFX_CLKCTRL 0>;
clock-names = "fck";
resets = <&prm_gfx 0>;
reset-names = "rstctrl";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x56000000 0x1000000>;
};
};
};

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27 changes: 26 additions & 1 deletion arch/arm/boot/dts/am437x-sk-evm.dts
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Expand Up @@ -272,6 +272,12 @@
>;
};

clkout1_pin: pinmux_clkout1_pin {
pinctrl-single,pins = <
0x270 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* XDMA_EVENT_INTR0/CLKOUT1 */
>;
};

cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
Expand Down Expand Up @@ -593,6 +599,25 @@
pinctrl-0 = <&i2c1_pins>;
clock-frequency = <400000>;

ov2659@30 {
compatible = "ovti,ov2659";
reg = <0x30>;
pinctrl-names = "default";
pinctrl-0 = <&clkout1_pin>;

clocks = <&clkout1_mux_ck>;
clock-names = "xvclk";
assigned-clocks = <&clkout1_mux_ck>;
assigned-clock-parents = <&clkout1_osc_div_ck>;

port {
ov2659_1: endpoint {
remote-endpoint = <&vpfe0_ep>;
link-frequencies = /bits/ 64 <70000000>;
};
};
};

edt-ft5306@38 {
status = "okay";
compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
Expand Down Expand Up @@ -877,7 +902,7 @@
/* Camera port */
port {
vpfe0_ep: endpoint {
/* remote-endpoint = <&sensor>; add once we have it */
remote-endpoint = <&ov2659_1>;
ti,am437x-vpfe-interface = <0>;
bus-width = <8>;
hsync-active = <0>;
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23 changes: 22 additions & 1 deletion arch/arm/boot/dts/am43x-epos-evm.dts
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Expand Up @@ -145,6 +145,12 @@
system-clock-frequency = <12000000>;
};
};

audio_mstrclk: clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <12000000>;
};
};

&am43xx_pinmux {
Expand Down Expand Up @@ -696,6 +702,21 @@
IOVDD-supply = <&dcdc4>; /* V3_3D -> DCDC4 */
DVDD-supply = <&ldo1>; /* V1_8AUD -> V1_8D -> LDO1 */
};

ov2659@30 {
compatible = "ovti,ov2659";
reg = <0x30>;

clocks = <&audio_mstrclk>;
clock-names = "xvclk";

port {
ov2659_1: endpoint {
remote-endpoint = <&vpfe1_ep>;
link-frequencies = /bits/ 64 <70000000>;
};
};
};
};

&i2c2 {
Expand Down Expand Up @@ -964,7 +985,7 @@

port {
vpfe1_ep: endpoint {
/* remote-endpoint = <&sensor>; add once we have it */
remote-endpoint = <&ov2659_1>;
ti,am437x-vpfe-interface = <0>;
bus-width = <8>;
hsync-active = <0>;
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54 changes: 54 additions & 0 deletions arch/arm/boot/dts/am43xx-clocks.dtsi
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Expand Up @@ -704,6 +704,60 @@
ti,bit-shift = <8>;
reg = <0x2a48>;
};

clkout1_osc_div_ck: clkout1-osc-div-ck {
#clock-cells = <0>;
compatible = "ti,divider-clock";
clocks = <&sys_clkin_ck>;
ti,bit-shift = <20>;
ti,max-div = <4>;
reg = <0x4100>;
};

clkout1_src2_mux_ck: clkout1-src2-mux-ck {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clocks = <&clk_rc32k_ck>, <&sysclk_div>, <&dpll_ddr_m2_ck>,
<&dpll_per_m2_ck>, <&dpll_disp_m2_ck>,
<&dpll_mpu_m2_ck>;
reg = <0x4100>;
};

clkout1_src2_pre_div_ck: clkout1-src2-pre-div-ck {
#clock-cells = <0>;
compatible = "ti,divider-clock";
clocks = <&clkout1_src2_mux_ck>;
ti,bit-shift = <4>;
ti,max-div = <8>;
reg = <0x4100>;
};

clkout1_src2_post_div_ck: clkout1-src2-post-div-ck {
#clock-cells = <0>;
compatible = "ti,divider-clock";
clocks = <&clkout1_src2_pre_div_ck>;
ti,bit-shift = <8>;
ti,max-div = <32>;
ti,index-power-of-two;
reg = <0x4100>;
};

clkout1_mux_ck: clkout1-mux-ck {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clocks = <&clkout1_osc_div_ck>, <&clk_rc32k_ck>,
<&clkout1_src2_post_div_ck>, <&dpll_extdev_m2_ck>;
ti,bit-shift = <16>;
reg = <0x4100>;
};

clkout1_ck: clkout1-ck {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clocks = <&clkout1_mux_ck>;
ti,bit-shift = <23>;
reg = <0x4100>;
};
};

&prcm {
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71 changes: 62 additions & 9 deletions arch/arm/boot/dts/dra7-l4.dtsi
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Expand Up @@ -4176,35 +4176,88 @@
};

target-module@170000 { /* 0x48970000, ap 21 0a.0 */
compatible = "ti,sysc";
status = "disabled";
compatible = "ti,sysc-omap4", "ti,sysc";
reg = <0x170010 0x4>;
reg-names = "sysc";
ti,sysc-midle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
clocks = <&cam_clkctrl DRA7_CAM_VIP1_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x170000 0x10000>;
status = "disabled";
};

target-module@190000 { /* 0x48990000, ap 23 2e.0 */
compatible = "ti,sysc";
status = "disabled";
compatible = "ti,sysc-omap4", "ti,sysc";
reg = <0x190010 0x4>;
reg-names = "sysc";
ti,sysc-midle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
clocks = <&cam_clkctrl DRA7_CAM_VIP2_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x190000 0x10000>;
status = "disabled";
};

target-module@1b0000 { /* 0x489b0000, ap 25 34.0 */
compatible = "ti,sysc";
status = "disabled";
compatible = "ti,sysc-omap4", "ti,sysc";
reg = <0x1b0000 0x4>,
<0x1b0010 0x4>;
reg-names = "rev", "sysc";
ti,sysc-midle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
clocks = <&cam_clkctrl DRA7_CAM_VIP3_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x1b0000 0x10000>;
status = "disabled";
};

target-module@1d0000 { /* 0x489d0000, ap 27 30.0 */
compatible = "ti,sysc";
status = "disabled";
target-module@1d0010 { /* 0x489d0000, ap 27 30.0 */
compatible = "ti,sysc-omap4", "ti,sysc";
reg = <0x1d0010 0x4>;
reg-names = "sysc";
ti,sysc-midle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
clocks = <&vpe_clkctrl DRA7_VPE_VPE_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x1d0000 0x10000>;

vpe: vpe@0 {
compatible = "ti,dra7-vpe";
reg = <0x0000 0x120>,
<0x0700 0x80>,
<0x5700 0x18>,
<0xd000 0x400>;
reg-names = "vpe_top",
"sc",
"csc",
"vpdma";
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
};
};
};
};
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18 changes: 18 additions & 0 deletions arch/arm/boot/dts/dra7.dtsi
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Expand Up @@ -673,6 +673,24 @@
status = "disabled";
};

target-module@56000000 {
compatible = "ti,sysc-omap4", "ti,sysc";
reg = <0x5600fe00 0x4>,
<0x5600fe10 0x4>;
reg-names = "rev", "sysc";
ti,sysc-midle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
clocks = <&gpu_clkctrl DRA7_GPU_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x56000000 0x2000000>;
};

crossbar_mpu: crossbar@4a002a48 {
compatible = "ti,irq-crossbar";
reg = <0x4a002a48 0x130>;
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31 changes: 31 additions & 0 deletions arch/arm/boot/dts/dra72-evm-common.dtsi
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Expand Up @@ -187,6 +187,12 @@
gpio = <&gpio5 8 GPIO_ACTIVE_HIGH>;
enable-active-high;
};

clk_ov5640_fixed: clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};

&dra7_pmx_core {
Expand Down Expand Up @@ -269,6 +275,23 @@
line-name = "vin6_sel_s0";
};
};

ov5640@3c {
compatible = "ovti,ov5640";
reg = <0x3c>;

clocks = <&clk_ov5640_fixed>;
clock-names = "xclk";

port {
csi2_cam0: endpoint {
remote-endpoint = <&csi2_phy0>;
clock-lanes = <0>;
data-lanes = <1 2>;
};
};
};

};

&uart1 {
Expand Down Expand Up @@ -580,3 +603,11 @@
&pcie1_rc {
status = "okay";
};

&csi2_0 {
csi2_phy0: endpoint {
remote-endpoint = <&csi2_cam0>;
clock-lanes = <0>;
data-lanes = <1 2>;
};
};
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