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ARM: dts: OMAP3+: Add PRM interrupt
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Provide OMAP3, 4 and OMAP5 with interrupt number for PRM

And for DRA7, provide crossbar number for prm interrupt.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Nishanth Menon authored and Tony Lindgren committed Sep 9, 2014
1 parent 01ac456 commit 5081ce6
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1 change: 1 addition & 0 deletions arch/arm/boot/dts/dra7.dtsi
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prm: prm@4ae06000 {
compatible = "ti,dra7-prm";
reg = <0x4ae06000 0x3000>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;

prm_clocks: clocks {
#address-cells = <1>;
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1 change: 1 addition & 0 deletions arch/arm/boot/dts/omap3.dtsi
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Expand Up @@ -97,6 +97,7 @@
prm: prm@48306000 {
compatible = "ti,omap3-prm";
reg = <0x48306000 0x4000>;
interrupts = <11>;

prm_clocks: clocks {
#address-cells = <1>;
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1 change: 1 addition & 0 deletions arch/arm/boot/dts/omap4.dtsi
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Expand Up @@ -129,6 +129,7 @@
prm: prm@4a306000 {
compatible = "ti,omap4-prm";
reg = <0x4a306000 0x3000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;

prm_clocks: clocks {
#address-cells = <1>;
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1 change: 1 addition & 0 deletions arch/arm/boot/dts/omap5.dtsi
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Expand Up @@ -131,6 +131,7 @@
prm: prm@4ae06000 {
compatible = "ti,omap5-prm";
reg = <0x4ae06000 0x3000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;

prm_clocks: clocks {
#address-cells = <1>;
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