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Merge branch '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/t
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nguy/next-queue

Tony Nguyen says:

====================
1GbE Intel Wired LAN Driver Updates 2021-07-16

Vinicius Costa Gomes says:

Add support for steering traffic to specific RX queues using Flex Filters.

As the name implies, Flex Filters are more flexible than using
Layer-2, VLAN or MAC address filters, one of the reasons is that they
allow "AND" operations more easily, e.g. when the user wants to steer
some traffic based on the source MAC address and the packet ethertype.

Future work include adding support for offloading tc-u32 filters to
the hardware.

The series is divided as follows:

Patch 1/5, add the low level primitives for configuring Flex filters.

Patch 2/5 and 3/5, allow ethtool to manage Flex filters.

Patch 4/5, when specifying filters that have multiple predicates, use
Flex filters.

Patch 5/5, Adds support for exposing the i225 LEDs using the LED subsystem.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller committed Jul 17, 2021
2 parents 08041a9 + cf83318 commit 5242b0c
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Showing 6 changed files with 595 additions and 24 deletions.
1 change: 1 addition & 0 deletions drivers/net/ethernet/intel/Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -335,6 +335,7 @@ config IGC
tristate "Intel(R) Ethernet Controller I225-LM/I225-V support"
default n
depends on PCI
depends on LEDS_CLASS
help
This driver supports Intel(R) Ethernet Controller I225-LM/I225-V
family of adapters.
Expand Down
48 changes: 41 additions & 7 deletions drivers/net/ethernet/intel/igc/igc.h
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Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,7 @@
#include <linux/ptp_clock_kernel.h>
#include <linux/timecounter.h>
#include <linux/net_tstamp.h>
#include <linux/leds.h>

#include "igc_hw.h"

Expand All @@ -33,6 +34,8 @@ void igc_ethtool_set_ops(struct net_device *);
#define IGC_N_PEROUT 2
#define IGC_N_SDP 4

#define MAX_FLEX_FILTER 32

enum igc_mac_filter_type {
IGC_MAC_FILTER_TYPE_DST = 0,
IGC_MAC_FILTER_TYPE_SRC
Expand Down Expand Up @@ -237,8 +240,17 @@ struct igc_adapter {
struct timespec64 start;
struct timespec64 period;
} perout[IGC_N_PEROUT];

/* LEDs */
struct mutex led_mutex;
struct led_classdev led0;
struct led_classdev led1;
struct led_classdev led2;
};

#define led_to_igc(ldev, led) \
container_of(ldev, struct igc_adapter, led)

void igc_up(struct igc_adapter *adapter);
void igc_down(struct igc_adapter *adapter);
int igc_open(struct net_device *netdev);
Expand Down Expand Up @@ -476,31 +488,53 @@ struct igc_q_vector {
};

enum igc_filter_match_flags {
IGC_FILTER_FLAG_ETHER_TYPE = 0x1,
IGC_FILTER_FLAG_VLAN_TCI = 0x2,
IGC_FILTER_FLAG_SRC_MAC_ADDR = 0x4,
IGC_FILTER_FLAG_DST_MAC_ADDR = 0x8,
IGC_FILTER_FLAG_ETHER_TYPE = BIT(0),
IGC_FILTER_FLAG_VLAN_TCI = BIT(1),
IGC_FILTER_FLAG_SRC_MAC_ADDR = BIT(2),
IGC_FILTER_FLAG_DST_MAC_ADDR = BIT(3),
IGC_FILTER_FLAG_USER_DATA = BIT(4),
IGC_FILTER_FLAG_VLAN_ETYPE = BIT(5),
};

struct igc_nfc_filter {
u8 match_flags;
u16 etype;
__be16 vlan_etype;
u16 vlan_tci;
u8 src_addr[ETH_ALEN];
u8 dst_addr[ETH_ALEN];
u8 user_data[8];
u8 user_mask[8];
u8 flex_index;
u8 rx_queue;
u8 prio;
u8 immediate_irq;
u8 drop;
};

struct igc_nfc_rule {
struct list_head list;
struct igc_nfc_filter filter;
u32 location;
u16 action;
bool flex;
};

/* IGC supports a total of 32 NFC rules: 16 MAC address based,, 8 VLAN priority
* based, and 8 ethertype based.
/* IGC supports a total of 32 NFC rules: 16 MAC address based, 8 VLAN priority
* based, 8 ethertype based and 32 Flex filter based rules.
*/
#define IGC_MAX_RXNFC_RULES 32
#define IGC_MAX_RXNFC_RULES 64

struct igc_flex_filter {
u8 index;
u8 data[128];
u8 mask[16];
u8 length;
u8 rx_queue;
u8 prio;
u8 immediate_irq;
u8 drop;
};

/* igc_desc_unused - calculate if we have unused descriptors */
static inline u16 igc_desc_unused(const struct igc_ring *ring)
Expand Down
62 changes: 57 additions & 5 deletions drivers/net/ethernet/intel/igc/igc_defines.h
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Original file line number Diff line number Diff line change
Expand Up @@ -17,11 +17,22 @@
#define IGC_WUC_PME_EN 0x00000002 /* PME Enable */

/* Wake Up Filter Control */
#define IGC_WUFC_LNKC 0x00000001 /* Link Status Change Wakeup Enable */
#define IGC_WUFC_MAG 0x00000002 /* Magic Packet Wakeup Enable */
#define IGC_WUFC_EX 0x00000004 /* Directed Exact Wakeup Enable */
#define IGC_WUFC_MC 0x00000008 /* Directed Multicast Wakeup Enable */
#define IGC_WUFC_BC 0x00000010 /* Broadcast Wakeup Enable */
#define IGC_WUFC_LNKC 0x00000001 /* Link Status Change Wakeup Enable */
#define IGC_WUFC_MAG 0x00000002 /* Magic Packet Wakeup Enable */
#define IGC_WUFC_EX 0x00000004 /* Directed Exact Wakeup Enable */
#define IGC_WUFC_MC 0x00000008 /* Directed Multicast Wakeup Enable */
#define IGC_WUFC_BC 0x00000010 /* Broadcast Wakeup Enable */
#define IGC_WUFC_FLEX_HQ BIT(14) /* Flex Filters Host Queuing */
#define IGC_WUFC_FLX0 BIT(16) /* Flexible Filter 0 Enable */
#define IGC_WUFC_FLX1 BIT(17) /* Flexible Filter 1 Enable */
#define IGC_WUFC_FLX2 BIT(18) /* Flexible Filter 2 Enable */
#define IGC_WUFC_FLX3 BIT(19) /* Flexible Filter 3 Enable */
#define IGC_WUFC_FLX4 BIT(20) /* Flexible Filter 4 Enable */
#define IGC_WUFC_FLX5 BIT(21) /* Flexible Filter 5 Enable */
#define IGC_WUFC_FLX6 BIT(22) /* Flexible Filter 6 Enable */
#define IGC_WUFC_FLX7 BIT(23) /* Flexible Filter 7 Enable */

#define IGC_WUFC_FILTER_MASK GENMASK(23, 14)

#define IGC_CTRL_ADVD3WUC 0x00100000 /* D3 WUC */

Expand All @@ -46,6 +57,37 @@
/* Wake Up Packet Memory stores the first 128 bytes of the wake up packet */
#define IGC_WUPM_BYTES 128

/* Wakeup Filter Control Extended */
#define IGC_WUFC_EXT_FLX8 BIT(8) /* Flexible Filter 8 Enable */
#define IGC_WUFC_EXT_FLX9 BIT(9) /* Flexible Filter 9 Enable */
#define IGC_WUFC_EXT_FLX10 BIT(10) /* Flexible Filter 10 Enable */
#define IGC_WUFC_EXT_FLX11 BIT(11) /* Flexible Filter 11 Enable */
#define IGC_WUFC_EXT_FLX12 BIT(12) /* Flexible Filter 12 Enable */
#define IGC_WUFC_EXT_FLX13 BIT(13) /* Flexible Filter 13 Enable */
#define IGC_WUFC_EXT_FLX14 BIT(14) /* Flexible Filter 14 Enable */
#define IGC_WUFC_EXT_FLX15 BIT(15) /* Flexible Filter 15 Enable */
#define IGC_WUFC_EXT_FLX16 BIT(16) /* Flexible Filter 16 Enable */
#define IGC_WUFC_EXT_FLX17 BIT(17) /* Flexible Filter 17 Enable */
#define IGC_WUFC_EXT_FLX18 BIT(18) /* Flexible Filter 18 Enable */
#define IGC_WUFC_EXT_FLX19 BIT(19) /* Flexible Filter 19 Enable */
#define IGC_WUFC_EXT_FLX20 BIT(20) /* Flexible Filter 20 Enable */
#define IGC_WUFC_EXT_FLX21 BIT(21) /* Flexible Filter 21 Enable */
#define IGC_WUFC_EXT_FLX22 BIT(22) /* Flexible Filter 22 Enable */
#define IGC_WUFC_EXT_FLX23 BIT(23) /* Flexible Filter 23 Enable */
#define IGC_WUFC_EXT_FLX24 BIT(24) /* Flexible Filter 24 Enable */
#define IGC_WUFC_EXT_FLX25 BIT(25) /* Flexible Filter 25 Enable */
#define IGC_WUFC_EXT_FLX26 BIT(26) /* Flexible Filter 26 Enable */
#define IGC_WUFC_EXT_FLX27 BIT(27) /* Flexible Filter 27 Enable */
#define IGC_WUFC_EXT_FLX28 BIT(28) /* Flexible Filter 28 Enable */
#define IGC_WUFC_EXT_FLX29 BIT(29) /* Flexible Filter 29 Enable */
#define IGC_WUFC_EXT_FLX30 BIT(30) /* Flexible Filter 30 Enable */
#define IGC_WUFC_EXT_FLX31 BIT(31) /* Flexible Filter 31 Enable */

#define IGC_WUFC_EXT_FILTER_MASK GENMASK(31, 8)

/* Physical Func Reset Done Indication */
#define IGC_CTRL_EXT_LINK_MODE_MASK 0x00C00000

/* Loop limit on how long we wait for auto-negotiation to complete */
#define COPPER_LINK_UP_LIMIT 10
#define PHY_AUTO_NEG_LIMIT 45
Expand Down Expand Up @@ -102,6 +144,16 @@
#define IGC_CTRL_SDP0_DIR 0x00400000 /* SDP0 Data direction */
#define IGC_CTRL_SDP1_DIR 0x00800000 /* SDP1 Data direction */

/* LED Control */
#define IGC_LEDCTL_LED0_MODE_SHIFT 0
#define IGC_LEDCTL_LED0_MODE_MASK GENMASK(3, 0)
#define IGC_LEDCTL_LED1_MODE_SHIFT 8
#define IGC_LEDCTL_LED1_MODE_MASK GENMASK(11, 8)
#define IGC_LEDCTL_LED2_MODE_SHIFT 16
#define IGC_LEDCTL_LED2_MODE_MASK GENMASK(19, 16)

#define IGC_CONNSW_AUTOSENSE_EN 0x1

/* As per the EAS the maximum supported size is 9.5KB (9728 bytes) */
#define MAX_JUMBO_FRAME_SIZE 0x2600

Expand Down
41 changes: 30 additions & 11 deletions drivers/net/ethernet/intel/igc/igc_ethtool.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -979,6 +979,12 @@ static int igc_ethtool_get_nfc_rule(struct igc_adapter *adapter,
eth_broadcast_addr(fsp->m_u.ether_spec.h_source);
}

if (rule->filter.match_flags & IGC_FILTER_FLAG_USER_DATA) {
fsp->flow_type |= FLOW_EXT;
memcpy(fsp->h_ext.data, rule->filter.user_data, sizeof(fsp->h_ext.data));
memcpy(fsp->m_ext.data, rule->filter.user_mask, sizeof(fsp->m_ext.data));
}

mutex_unlock(&adapter->nfc_rule_lock);
return 0;

Expand Down Expand Up @@ -1215,6 +1221,30 @@ static void igc_ethtool_init_nfc_rule(struct igc_nfc_rule *rule,
ether_addr_copy(rule->filter.dst_addr,
fsp->h_u.ether_spec.h_dest);
}

/* VLAN etype matching */
if ((fsp->flow_type & FLOW_EXT) && fsp->h_ext.vlan_etype) {
rule->filter.vlan_etype = fsp->h_ext.vlan_etype;
rule->filter.match_flags |= IGC_FILTER_FLAG_VLAN_ETYPE;
}

/* Check for user defined data */
if ((fsp->flow_type & FLOW_EXT) &&
(fsp->h_ext.data[0] || fsp->h_ext.data[1])) {
rule->filter.match_flags |= IGC_FILTER_FLAG_USER_DATA;
memcpy(rule->filter.user_data, fsp->h_ext.data, sizeof(fsp->h_ext.data));
memcpy(rule->filter.user_mask, fsp->m_ext.data, sizeof(fsp->m_ext.data));
}

/* When multiple filter options or user data or vlan etype is set, use a
* flex filter.
*/
if ((rule->filter.match_flags & IGC_FILTER_FLAG_USER_DATA) ||
(rule->filter.match_flags & IGC_FILTER_FLAG_VLAN_ETYPE) ||
(rule->filter.match_flags & (rule->filter.match_flags - 1)))
rule->flex = true;
else
rule->flex = false;
}

/**
Expand Down Expand Up @@ -1244,11 +1274,6 @@ static int igc_ethtool_check_nfc_rule(struct igc_adapter *adapter,
return -EINVAL;
}

if (flags & (flags - 1)) {
netdev_dbg(dev, "Rule with multiple matches not supported\n");
return -EOPNOTSUPP;
}

list_for_each_entry(tmp, &adapter->nfc_rule_list, list) {
if (!memcmp(&rule->filter, &tmp->filter,
sizeof(rule->filter)) &&
Expand Down Expand Up @@ -1280,12 +1305,6 @@ static int igc_ethtool_add_nfc_rule(struct igc_adapter *adapter,
return -EOPNOTSUPP;
}

if ((fsp->flow_type & FLOW_EXT) &&
fsp->m_ext.vlan_tci != htons(VLAN_PRIO_MASK)) {
netdev_dbg(netdev, "VLAN mask not supported\n");
return -EOPNOTSUPP;
}

if (fsp->ring_cookie >= adapter->num_rx_queues) {
netdev_dbg(netdev, "Invalid action\n");
return -EINVAL;
Expand Down
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