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Merge tag 'asoc-v3.17' into asoc-linus
ASoC: Updates for v3.17 This has been a pretty exciting release in terms of the framework, we've finally got support for multiple CODECs attached to a single DAI link which has been something there's been interest in as long as I've been working on ASoC. A big thanks to Benoit and Misael for their work on this. Otherwise it's been a fairly standard release for development, including more componentisation work from Lars-Peter and a good selection of both CODEC and CPU drivers. - Support for multiple CODECs attached to a single DAI, enabling systems with for example multiple DAC/speaker drivers on a single link, contributed by Benoit Cousson based on work from Misael Lopez Cruz. - Support for byte controls larger than 256 bytes based on the use of TLVs contributed by Omair Mohammed Abdullah. - More componentisation work from Lars-Peter Clausen. - The remainder of the conversions of CODEC drivers to params_width() - Drivers for Cirrus Logic CS4265, Freescale i.MX ASRC blocks, Realtek RT286 and RT5670, Rockchip RK3xxx I2S controllers and Texas Instruments TAS2552. - Lots of updates and fixes, especially to the DaVinci, Intel, Freescale, Realtek, and rcar drivers. # gpg: Signature made Mon 04 Aug 2014 17:13:21 BST using RSA key ID 7EA229BD # gpg: Good signature from "Mark Brown <broonie@sirena.org.uk>" # gpg: aka "Mark Brown <broonie@debian.org>" # gpg: aka "Mark Brown <broonie@kernel.org>" # gpg: aka "Mark Brown <broonie@tardis.ed.ac.uk>" # gpg: aka "Mark Brown <broonie@linaro.org>" # gpg: aka "Mark Brown <Mark.Brown@linaro.org>"
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CS4265 audio CODEC | ||
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This device supports I2C only. | ||
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Required properties: | ||
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- compatible : "cirrus,cs4265" | ||
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- reg : the I2C address of the device for I2C. The I2C address depends on | ||
the state of the AD0 pin. If AD0 is high, the i2c address is 0x4f. | ||
If it is low, the i2c address is 0x4e. | ||
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Optional properties: | ||
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- reset-gpios : a GPIO spec for the reset pin. If specified, it will be | ||
deasserted before communication to the codec starts. | ||
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Examples: | ||
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codec_ad0_high: cs4265@4f { /* AD0 Pin is high */ | ||
compatible = "cirrus,cs4265"; | ||
reg = <0x4f>; | ||
}; | ||
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codec_ad0_low: cs4265@4e { /* AD0 Pin is low */ | ||
compatible = "cirrus,cs4265"; | ||
reg = <0x4e>; | ||
}; |
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Freescale Asynchronous Sample Rate Converter (ASRC) Controller | ||
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The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate of a | ||
signal associated with an input clock into a signal associated with a different | ||
output clock. The driver currently works as a Front End of DPCM with other Back | ||
Ends Audio controller such as ESAI, SSI and SAI. It has three pairs to support | ||
three substreams within totally 10 channels. | ||
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Required properties: | ||
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- compatible : Contains "fsl,imx35-asrc" or "fsl,imx53-asrc". | ||
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- reg : Offset and length of the register set for the device. | ||
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- interrupts : Contains the spdif interrupt. | ||
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- dmas : Generic dma devicetree binding as described in | ||
Documentation/devicetree/bindings/dma/dma.txt. | ||
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- dma-names : Contains "rxa", "rxb", "rxc", "txa", "txb" and "txc". | ||
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- clocks : Contains an entry for each entry in clock-names. | ||
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- clock-names : Contains the following entries | ||
"mem" Peripheral access clock to access registers. | ||
"ipg" Peripheral clock to driver module. | ||
"asrck_<0-f>" Clock sources for input and output clock. | ||
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- big-endian : If this property is absent, the little endian mode | ||
will be in use as default. Otherwise, the big endian | ||
mode will be in use for all the device registers. | ||
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- fsl,asrc-rate : Defines a mutual sample rate used by DPCM Back Ends. | ||
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- fsl,asrc-width : Defines a mutual sample width used by DPCM Back Ends. | ||
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Example: | ||
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asrc: asrc@02034000 { | ||
compatible = "fsl,imx53-asrc"; | ||
reg = <0x02034000 0x4000>; | ||
interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>; | ||
clocks = <&clks 107>, <&clks 107>, <&clks 0>, | ||
<&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, | ||
<&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, | ||
<&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, | ||
<&clks 107>, <&clks 0>, <&clks 0>; | ||
clock-names = "mem", "ipg", "asrck0", | ||
"asrck_1", "asrck_2", "asrck_3", "asrck_4", | ||
"asrck_5", "asrck_6", "asrck_7", "asrck_8", | ||
"asrck_9", "asrck_a", "asrck_b", "asrck_c", | ||
"asrck_d", "asrck_e", "asrck_f"; | ||
dmas = <&sdma 17 23 1>, <&sdma 18 23 1>, <&sdma 19 23 1>, | ||
<&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>; | ||
dma-names = "rxa", "rxb", "rxc", | ||
"txa", "txb", "txc"; | ||
fsl,asrc-rate = <48000>; | ||
fsl,asrc-width = <16>; | ||
status = "okay"; | ||
}; |
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* Rockchip I2S controller | ||
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The I2S bus (Inter-IC sound bus) is a serial link for digital | ||
audio data transfer between devices in the system. | ||
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Required properties: | ||
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- compatible: should be one of the followings | ||
- "rockchip,rk3066-i2s": for rk3066 | ||
- "rockchip,rk3188-i2s", "rockchip,rk3066-i2s": for rk3188 | ||
- "rockchip,rk3288-i2s", "rockchip,rk3066-i2s": for rk3288 | ||
- reg: physical base address of the controller and length of memory mapped | ||
region. | ||
- interrupts: should contain the I2S interrupt. | ||
- #address-cells: should be 1. | ||
- #size-cells: should be 0. | ||
- dmas: DMA specifiers for tx and rx dma. See the DMA client binding, | ||
Documentation/devicetree/bindings/dma/dma.txt | ||
- dma-names: should include "tx" and "rx". | ||
- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names. | ||
- clock-names: should contain followings: | ||
- "i2s_hclk": clock for I2S BUS | ||
- "i2s_clk" : clock for I2S controller | ||
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Example for rk3288 I2S controller: | ||
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i2s@ff890000 { | ||
compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s"; | ||
reg = <0xff890000 0x10000>; | ||
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
dmas = <&pdma1 0>, <&pdma1 1>; | ||
dma-names = "rx", "tx"; | ||
clock-names = "i2s_hclk", "i2s_clk"; | ||
clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>; | ||
}; |
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Documentation/devicetree/bindings/sound/samsung,odroidx2-max98090.txt
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Samsung Exynos Odroid X2/U3 audio complex with MAX98090 codec | ||
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Required properties: | ||
- compatible : "samsung,odroidx2-audio" - for Odroid X2 board, | ||
"samsung,odroidu3-audio" - for Odroid U3 board | ||
- samsung,model : the user-visible name of this sound complex | ||
- samsung,i2s-controller : the phandle of the I2S controller | ||
- samsung,audio-codec : the phandle of the MAX98090 audio codec | ||
- samsung,audio-routing : a list of the connections between audio | ||
components; each entry is a pair of strings, the first being the | ||
connection's sink, the second being the connection's source; | ||
valid names for sources and sinks are the MAX98090's pins (as | ||
documented in its binding), and the jacks on the board | ||
For Odroid X2: | ||
* Headphone Jack | ||
* Mic Jack | ||
* DMIC | ||
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For Odroid U3: | ||
* Headphone Jack | ||
* Speakers | ||
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Example: | ||
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sound { | ||
compatible = "samsung,odroidu3-audio"; | ||
samsung,i2s-controller = <&i2s0>; | ||
samsung,audio-codec = <&max98090>; | ||
samsung,model = "Odroid-X2"; | ||
samsung,audio-routing = | ||
"Headphone Jack", "HPL", | ||
"Headphone Jack", "HPR", | ||
"IN1", "Mic Jack", | ||
"Mic Jack", "MICBIAS"; | ||
}; |
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* SiRF SoC USP module | ||
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Required properties: | ||
- compatible: "sirf,prima2-usp-pcm" | ||
- reg: Base address and size entries: | ||
- dmas: List of DMA controller phandle and DMA request line ordered pairs. | ||
- dma-names: Identifier string for each DMA request line in the dmas property. | ||
These strings correspond 1:1 with the ordered pairs in dmas. | ||
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One of the DMA channels will be responsible for transmission (should be | ||
named "tx") and one for reception (should be named "rx"). | ||
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- clocks: USP controller clock source | ||
- pinctrl-names: Must contain a "default" entry. | ||
- pinctrl-NNN: One property must exist for each entry in pinctrl-names. | ||
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Example: | ||
usp0: usp@b0080000 { | ||
compatible = "sirf,prima2-usp-pcm"; | ||
reg = <0xb0080000 0x10000>; | ||
clocks = <&clks 28>; | ||
dmas = <&dmac1 1>, <&dmac1 2>; | ||
dma-names = "rx", "tx"; | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&usp0_only_utfs_pins_a>; | ||
}; | ||
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Texas Instruments - tas2552 Codec module | ||
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The tas2552 serial control bus communicates through I2C protocols | ||
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Required properties: | ||
- compatible - One of: | ||
"ti,tas2552" - TAS2552 | ||
- reg - I2C slave address | ||
- supply-*: Required supply regulators are: | ||
"vbat" battery voltage | ||
"iovdd" I/O Voltage | ||
"avdd" Analog DAC Voltage | ||
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Optional properties: | ||
- enable-gpio - gpio pin to enable/disable the device | ||
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Example: | ||
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tas2552: tas2552@41 { | ||
compatible = "ti,tas2552"; | ||
reg = <0x41>; | ||
enable-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; | ||
}; | ||
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For more product information please see the link below: | ||
http://www.ti.com/product/TAS2552 |
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WM8904 audio CODEC | ||
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This device supports I2C only. | ||
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Required properties: | ||
- compatible: "wlf,wm8904" | ||
- reg: the I2C address of the device. | ||
- clock-names: "mclk" | ||
- clocks: reference to | ||
<Documentation/devicetree/bindings/clock/clock-bindings.txt> | ||
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Pins on the device (for linking into audio routes): | ||
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* IN1L | ||
* IN1R | ||
* IN2L | ||
* IN2R | ||
* IN3L | ||
* IN3R | ||
* HPOUTL | ||
* HPOUTR | ||
* LINEOUTL | ||
* LINEOUTR | ||
* MICBIAS | ||
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Examples: | ||
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codec: wm8904@1a { | ||
compatible = "wlf,wm8904"; | ||
reg = <0x1a>; | ||
clocks = <&pck0>; | ||
clock-names = "mclk"; | ||
}; |
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