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[PATCH] atmel_serial: Use __raw I/O register access
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Access to chip-internal registers should always be native-endian.  This is
especially important for AVR32 since it's a big-endian architecture and the
non-raw readl() and writel() macros are defined to do little-endian
accesses.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Acked-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Haavard Skinnemoen authored and Linus Torvalds committed Feb 12, 2007
1 parent 3991d3b commit 544fc72
Showing 1 changed file with 27 additions and 27 deletions.
54 changes: 27 additions & 27 deletions drivers/serial/atmel_serial.c
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Original file line number Diff line number Diff line change
Expand Up @@ -73,35 +73,35 @@

#define ATMEL_ISR_PASS_LIMIT 256

#define UART_PUT_CR(port,v) writel(v, (port)->membase + ATMEL_US_CR)
#define UART_GET_MR(port) readl((port)->membase + ATMEL_US_MR)
#define UART_PUT_MR(port,v) writel(v, (port)->membase + ATMEL_US_MR)
#define UART_PUT_IER(port,v) writel(v, (port)->membase + ATMEL_US_IER)
#define UART_PUT_IDR(port,v) writel(v, (port)->membase + ATMEL_US_IDR)
#define UART_GET_IMR(port) readl((port)->membase + ATMEL_US_IMR)
#define UART_GET_CSR(port) readl((port)->membase + ATMEL_US_CSR)
#define UART_GET_CHAR(port) readl((port)->membase + ATMEL_US_RHR)
#define UART_PUT_CHAR(port,v) writel(v, (port)->membase + ATMEL_US_THR)
#define UART_GET_BRGR(port) readl((port)->membase + ATMEL_US_BRGR)
#define UART_PUT_BRGR(port,v) writel(v, (port)->membase + ATMEL_US_BRGR)
#define UART_PUT_RTOR(port,v) writel(v, (port)->membase + ATMEL_US_RTOR)

// #define UART_GET_CR(port) readl((port)->membase + ATMEL_US_CR) // is write-only
#define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
#define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
#define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
#define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
#define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
#define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
#define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
#define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
#define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
#define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
#define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
#define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)

// #define UART_GET_CR(port) __raw_readl((port)->membase + ATMEL_US_CR) // is write-only

/* PDC registers */
#define UART_PUT_PTCR(port,v) writel(v, (port)->membase + ATMEL_PDC_PTCR)
#define UART_GET_PTSR(port) readl((port)->membase + ATMEL_PDC_PTSR)

#define UART_PUT_RPR(port,v) writel(v, (port)->membase + ATMEL_PDC_RPR)
#define UART_GET_RPR(port) readl((port)->membase + ATMEL_PDC_RPR)
#define UART_PUT_RCR(port,v) writel(v, (port)->membase + ATMEL_PDC_RCR)
#define UART_PUT_RNPR(port,v) writel(v, (port)->membase + ATMEL_PDC_RNPR)
#define UART_PUT_RNCR(port,v) writel(v, (port)->membase + ATMEL_PDC_RNCR)

#define UART_PUT_TPR(port,v) writel(v, (port)->membase + ATMEL_PDC_TPR)
#define UART_PUT_TCR(port,v) writel(v, (port)->membase + ATMEL_PDC_TCR)
//#define UART_PUT_TNPR(port,v) writel(v, (port)->membase + ATMEL_PDC_TNPR)
//#define UART_PUT_TNCR(port,v) writel(v, (port)->membase + ATMEL_PDC_TNCR)
#define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
#define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)

#define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
#define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
#define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
#define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
#define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)

#define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
#define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
//#define UART_PUT_TNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNPR)
//#define UART_PUT_TNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNCR)

static int (*atmel_open_hook)(struct uart_port *);
static void (*atmel_close_hook)(struct uart_port *);
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