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arm64: dts: renesas: r8a779{65,80,90}: Add IPMMU devices nodes
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Add IPMMU device nodes for the R-Car M3-N (r8a77965),
V3H (r8a77980) and E3 (r8a77990) SoCs.

* The r8a77965 IPMMU is quite similar to r8a7796 however VP0
  has been added and PV1 has been removed. Also the IMSSTR
  bit assignment has been reworked.

* The r8a77980 IPMMU is quite similar to r8a77970 however VC0
  has been added. The IMSSTR bit assignment has also been
  reworked. Power domains are also quite different however the
  the documentation is rather unclear about this topic.

  Until we know better VC0 gets assigned to R8A77980_PD_ALWAYS_ON.

* The r8a77990 IPMMU is similar to r8a77995. Power domains are
  however different and the public documentation is still unclear.

  Based on preliminary information from the hardware team the R-Car E3
  SoC comes with an IPMMU-VP0 device in an Always-on power domain and
  the IPMMU-VC0 is placed as expected in the A3VC power domain.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Magnus Damm authored and Simon Horman committed Jul 16, 2018
1 parent 0b65a9a commit 55697cb
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89 changes: 89 additions & 0 deletions arch/arm64/boot/dts/renesas/r8a77965.dtsi
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dma-channels = <16>;
};

ipmmu_ds0: mmu@e6740000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xe6740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 0>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_ds1: mmu@e7740000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xe7740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 1>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_hc: mmu@e6570000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xe6570000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 2>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_ir: mmu@ff8b0000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xff8b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 3>;
power-domains = <&sysc R8A77965_PD_A3IR>;
#iommu-cells = <1>;
};

ipmmu_mm: mmu@e67b0000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xe67b0000 0 0x1000>;
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_mp: mmu@ec670000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xec670000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 4>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_pv0: mmu@fd800000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xfd800000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 6>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_rt: mmu@ffc80000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xffc80000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 10>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_vc0: mmu@fe6b0000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xfe6b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 12>;
power-domains = <&sysc R8A77965_PD_A3VC>;
#iommu-cells = <1>;
};

ipmmu_vi0: mmu@febd0000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xfebd0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 14>;
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_vp0: mmu@fe990000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xfe990000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 16>;
power-domains = <&sysc R8A77965_PD_A3VP>;
#iommu-cells = <1>;
};

avb: ethernet@e6800000 {
compatible = "renesas,etheravb-r8a77965",
"renesas,etheravb-rcar-gen3";
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63 changes: 63 additions & 0 deletions arch/arm64/boot/dts/renesas/r8a77980.dtsi
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};
};

ipmmu_ds1: mmu@e7740000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xe7740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 0>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_vip0: mmu@e7b00000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xe7b00000 0 0x1000>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_vip1: mmu@e7960000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xe7960000 0 0x1000>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_ir: mmu@ff8b0000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xff8b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 3>;
power-domains = <&sysc R8A77980_PD_A3IR>;
#iommu-cells = <1>;
};

ipmmu_mm: mmu@e67b0000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xe67b0000 0 0x1000>;
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_rt: mmu@ffc80000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xffc80000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 10>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_vc0: mmu@fe6b0000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xfe6b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 12>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_vi0: mmu@febd0000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xfebd0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 14>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

avb: ethernet@e6800000 {
compatible = "renesas,etheravb-r8a77980",
"renesas,etheravb-rcar-gen3";
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82 changes: 82 additions & 0 deletions arch/arm64/boot/dts/renesas/r8a77990.dtsi
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#include <dt-bindings/clock/renesas-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/r8a77990-sysc.h>

/ {
compatible = "renesas,r8a77990";
Expand Down Expand Up @@ -210,6 +211,87 @@
#power-domain-cells = <1>;
};

ipmmu_ds0: mmu@e6740000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xe6740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 0>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_ds1: mmu@e7740000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xe7740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 1>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_hc: mmu@e6570000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xe6570000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 2>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_mm: mmu@e67b0000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xe67b0000 0 0x1000>;
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_mp: mmu@ec670000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xec670000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 4>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_pv0: mmu@fd800000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xfd800000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 6>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_rt: mmu@ffc80000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xffc80000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 10>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_vc0: mmu@fe6b0000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xfe6b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 12>;
power-domains = <&sysc R8A77990_PD_A3VC>;
#iommu-cells = <1>;
};

ipmmu_vi0: mmu@febd0000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xfebd0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 14>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

ipmmu_vp0: mmu@fe990000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xfe990000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 16>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};

avb: ethernet@e6800000 {
compatible = "renesas,etheravb-r8a77990",
"renesas,etheravb-rcar-gen3";
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