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arm64: defconfig: enable clock controller, interconnect and pinctrl f…
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…or QCS8300

Enable clock controller, interconnect and pinctrl for Qualcomm
QCS8300 platform to boot QCS8300 RIDE board to UART console.

The serial engine depends on gcc, interconnect and pinctrl. Since
the serial console driver is only available as built-in, so these
configs needs be built-in for the UART device to probe and register
the console.

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
Link: https://lore.kernel.org/r/20241203-qcs8300_initial_dtsi-v4-2-d7c953484024@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Jingyi Wang authored and Bjorn Andersson committed Dec 26, 2024
1 parent 8592294 commit 57039a2
Showing 1 changed file with 3 additions and 0 deletions.
3 changes: 3 additions & 0 deletions arch/arm64/configs/defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -608,6 +608,7 @@ CONFIG_PINCTRL_MSM8998=y
CONFIG_PINCTRL_QCM2290=y
CONFIG_PINCTRL_QCS404=y
CONFIG_PINCTRL_QCS615=y
CONFIG_PINCTRL_QCS8300=y
CONFIG_PINCTRL_QDF2XXX=y
CONFIG_PINCTRL_QDU1000=y
CONFIG_PINCTRL_SA8775P=y
Expand Down Expand Up @@ -1327,6 +1328,7 @@ CONFIG_QCM_GCC_2290=y
CONFIG_QCM_DISPCC_2290=m
CONFIG_QCS_GCC_404=y
CONFIG_QCS_GCC_615=y
CONFIG_QCS_GCC_8300=y
CONFIG_SC_CAMCC_7280=m
CONFIG_SA_CAMCC_8775P=m
CONFIG_QDU_GCC_1000=y
Expand Down Expand Up @@ -1638,6 +1640,7 @@ CONFIG_INTERCONNECT_QCOM_OSM_L3=m
CONFIG_INTERCONNECT_QCOM_QCM2290=y
CONFIG_INTERCONNECT_QCOM_QCS404=m
CONFIG_INTERCONNECT_QCOM_QCS615=y
CONFIG_INTERCONNECT_QCOM_QCS8300=y
CONFIG_INTERCONNECT_QCOM_QDU1000=y
CONFIG_INTERCONNECT_QCOM_SA8775P=y
CONFIG_INTERCONNECT_QCOM_SC7180=y
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