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drm/i915/guc: Update firmware to v62.0.0
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Most of the changes to the 62.0.0 firmware revolved around CTB
communication channel. Conform to the new (stable) CTB protocol.

v2:
 (Michal)
  Add values back to kernel DOC for actions
 (Docs)
  Add 'CT buffer' back in to fix warning

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
[mattrope: Tweaked kerneldoc while pushing as suggested by Daniele/Michal]
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210616001302.84233-3-matthew.brost@intel.com
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Michal Wajdeczko authored and Matt Roper committed Jun 18, 2021
1 parent 088b4d4 commit 572f2a5
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Showing 11 changed files with 527 additions and 421 deletions.
107 changes: 107 additions & 0 deletions drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
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#ifndef _ABI_GUC_ACTIONS_ABI_H
#define _ABI_GUC_ACTIONS_ABI_H

/**
* DOC: HOST2GUC_REGISTER_CTB
*
* This message is used as part of the `CTB based communication`_ setup.
*
* This message must be sent as `MMIO HXG Message`_.
*
* +---+-------+--------------------------------------------------------------+
* | | Bits | Description |
* +===+=======+==============================================================+
* | 0 | 31 | ORIGIN = GUC_HXG_ORIGIN_HOST_ |
* | +-------+--------------------------------------------------------------+
* | | 30:28 | TYPE = GUC_HXG_TYPE_REQUEST_ |
* | +-------+--------------------------------------------------------------+
* | | 27:16 | DATA0 = MBZ |
* | +-------+--------------------------------------------------------------+
* | | 15:0 | ACTION = _`GUC_ACTION_HOST2GUC_REGISTER_CTB` = 0x4505 |
* +---+-------+--------------------------------------------------------------+
* | 1 | 31:12 | RESERVED = MBZ |
* | +-------+--------------------------------------------------------------+
* | | 11:8 | **TYPE** - type for the `CT Buffer`_ |
* | | | |
* | | | - _`GUC_CTB_TYPE_HOST2GUC` = 0 |
* | | | - _`GUC_CTB_TYPE_GUC2HOST` = 1 |
* | +-------+--------------------------------------------------------------+
* | | 7:0 | **SIZE** - size of the `CT Buffer`_ in 4K units minus 1 |
* +---+-------+--------------------------------------------------------------+
* | 2 | 31:0 | **DESC_ADDR** - GGTT address of the `CTB Descriptor`_ |
* +---+-------+--------------------------------------------------------------+
* | 3 | 31:0 | **BUFF_ADDF** - GGTT address of the `CT Buffer`_ |
* +---+-------+--------------------------------------------------------------+
*
* +---+-------+--------------------------------------------------------------+
* | | Bits | Description |
* +===+=======+==============================================================+
* | 0 | 31 | ORIGIN = GUC_HXG_ORIGIN_GUC_ |
* | +-------+--------------------------------------------------------------+
* | | 30:28 | TYPE = GUC_HXG_TYPE_RESPONSE_SUCCESS_ |
* | +-------+--------------------------------------------------------------+
* | | 27:0 | DATA0 = MBZ |
* +---+-------+--------------------------------------------------------------+
*/
#define GUC_ACTION_HOST2GUC_REGISTER_CTB 0x4505

#define HOST2GUC_REGISTER_CTB_REQUEST_MSG_LEN (GUC_HXG_REQUEST_MSG_MIN_LEN + 3u)
#define HOST2GUC_REGISTER_CTB_REQUEST_MSG_0_MBZ GUC_HXG_REQUEST_MSG_0_DATA0
#define HOST2GUC_REGISTER_CTB_REQUEST_MSG_1_MBZ (0xfffff << 12)
#define HOST2GUC_REGISTER_CTB_REQUEST_MSG_1_TYPE (0xf << 8)
#define GUC_CTB_TYPE_HOST2GUC 0u
#define GUC_CTB_TYPE_GUC2HOST 1u
#define HOST2GUC_REGISTER_CTB_REQUEST_MSG_1_SIZE (0xff << 0)
#define HOST2GUC_REGISTER_CTB_REQUEST_MSG_2_DESC_ADDR GUC_HXG_REQUEST_MSG_n_DATAn
#define HOST2GUC_REGISTER_CTB_REQUEST_MSG_3_BUFF_ADDR GUC_HXG_REQUEST_MSG_n_DATAn

#define HOST2GUC_REGISTER_CTB_RESPONSE_MSG_LEN GUC_HXG_RESPONSE_MSG_MIN_LEN
#define HOST2GUC_REGISTER_CTB_RESPONSE_MSG_0_MBZ GUC_HXG_RESPONSE_MSG_0_DATA0

/**
* DOC: HOST2GUC_DEREGISTER_CTB
*
* This message is used as part of the `CTB based communication`_ teardown.
*
* This message must be sent as `MMIO HXG Message`_.
*
* +---+-------+--------------------------------------------------------------+
* | | Bits | Description |
* +===+=======+==============================================================+
* | 0 | 31 | ORIGIN = GUC_HXG_ORIGIN_HOST_ |
* | +-------+--------------------------------------------------------------+
* | | 30:28 | TYPE = GUC_HXG_TYPE_REQUEST_ |
* | +-------+--------------------------------------------------------------+
* | | 27:16 | DATA0 = MBZ |
* | +-------+--------------------------------------------------------------+
* | | 15:0 | ACTION = _`GUC_ACTION_HOST2GUC_DEREGISTER_CTB` = 0x4506 |
* +---+-------+--------------------------------------------------------------+
* | 1 | 31:12 | RESERVED = MBZ |
* | +-------+--------------------------------------------------------------+
* | | 11:8 | **TYPE** - type of the `CT Buffer`_ |
* | | | |
* | | | see `GUC_ACTION_HOST2GUC_REGISTER_CTB`_ |
* | +-------+--------------------------------------------------------------+
* | | 7:0 | RESERVED = MBZ |
* +---+-------+--------------------------------------------------------------+
*
* +---+-------+--------------------------------------------------------------+
* | | Bits | Description |
* +===+=======+==============================================================+
* | 0 | 31 | ORIGIN = GUC_HXG_ORIGIN_GUC_ |
* | +-------+--------------------------------------------------------------+
* | | 30:28 | TYPE = GUC_HXG_TYPE_RESPONSE_SUCCESS_ |
* | +-------+--------------------------------------------------------------+
* | | 27:0 | DATA0 = MBZ |
* +---+-------+--------------------------------------------------------------+
*/
#define GUC_ACTION_HOST2GUC_DEREGISTER_CTB 0x4506

#define HOST2GUC_DEREGISTER_CTB_REQUEST_MSG_LEN (GUC_HXG_REQUEST_MSG_MIN_LEN + 1u)
#define HOST2GUC_DEREGISTER_CTB_REQUEST_MSG_0_MBZ GUC_HXG_REQUEST_MSG_0_DATA0
#define HOST2GUC_DEREGISTER_CTB_REQUEST_MSG_1_MBZ (0xfffff << 12)
#define HOST2GUC_DEREGISTER_CTB_REQUEST_MSG_1_TYPE (0xf << 8)
#define HOST2GUC_DEREGISTER_CTB_REQUEST_MSG_1_MBZ2 (0xff << 0)

#define HOST2GUC_DEREGISTER_CTB_RESPONSE_MSG_LEN GUC_HXG_RESPONSE_MSG_MIN_LEN
#define HOST2GUC_DEREGISTER_CTB_RESPONSE_MSG_0_MBZ GUC_HXG_RESPONSE_MSG_0_DATA0

/* legacy definitions */

enum intel_guc_action {
INTEL_GUC_ACTION_DEFAULT = 0x0,
INTEL_GUC_ACTION_REQUEST_PREEMPTION = 0x2,
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126 changes: 104 additions & 22 deletions drivers/gpu/drm/i915/gt/uc/abi/guc_communication_ctb_abi.h
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#define _ABI_GUC_COMMUNICATION_CTB_ABI_H

#include <linux/types.h>
#include <linux/build_bug.h>

#include "guc_messages_abi.h"

/**
* DOC: CT Buffer
*
* Circular buffer used to send `CTB Message`_
*/

/**
* DOC: CTB Descriptor
*
* +---+-------+--------------------------------------------------------------+
* | | Bits | Description |
* +===+=======+==============================================================+
* | 0 | 31:0 | **HEAD** - offset (in dwords) to the last dword that was |
* | | | read from the `CT Buffer`_. |
* | | | It can only be updated by the receiver. |
* +---+-------+--------------------------------------------------------------+
* | 1 | 31:0 | **TAIL** - offset (in dwords) to the last dword that was |
* | | | written to the `CT Buffer`_. |
* | | | It can only be updated by the sender. |
* +---+-------+--------------------------------------------------------------+
* | 2 | 31:0 | **STATUS** - status of the CTB |
* | | | |
* | | | - _`GUC_CTB_STATUS_NO_ERROR` = 0 (normal operation) |
* | | | - _`GUC_CTB_STATUS_OVERFLOW` = 1 (head/tail too large) |
* | | | - _`GUC_CTB_STATUS_UNDERFLOW` = 2 (truncated message) |
* | | | - _`GUC_CTB_STATUS_MISMATCH` = 4 (head/tail modified) |
* +---+-------+--------------------------------------------------------------+
* |...| | RESERVED = MBZ |
* +---+-------+--------------------------------------------------------------+
* | 15| 31:0 | RESERVED = MBZ |
* +---+-------+--------------------------------------------------------------+
*/

struct guc_ct_buffer_desc {
u32 head;
u32 tail;
u32 status;
#define GUC_CTB_STATUS_NO_ERROR 0
#define GUC_CTB_STATUS_OVERFLOW (1 << 0)
#define GUC_CTB_STATUS_UNDERFLOW (1 << 1)
#define GUC_CTB_STATUS_MISMATCH (1 << 2)
u32 reserved[13];
} __packed;
static_assert(sizeof(struct guc_ct_buffer_desc) == 64);

/**
* DOC: CTB Message
*
* +---+-------+--------------------------------------------------------------+
* | | Bits | Description |
* +===+=======+==============================================================+
* | 0 | 31:16 | **FENCE** - message identifier |
* | +-------+--------------------------------------------------------------+
* | | 15:12 | **FORMAT** - format of the CTB message |
* | | | - _`GUC_CTB_FORMAT_HXG` = 0 - see `CTB HXG Message`_ |
* | +-------+--------------------------------------------------------------+
* | | 11:8 | **RESERVED** |
* | +-------+--------------------------------------------------------------+
* | | 7:0 | **NUM_DWORDS** - length of the CTB message (w/o header) |
* +---+-------+--------------------------------------------------------------+
* | 1 | 31:0 | optional (depends on FORMAT) |
* +---+-------+ |
* |...| | |
* +---+-------+ |
* | n | 31:0 | |
* +---+-------+--------------------------------------------------------------+
*/

#define GUC_CTB_MSG_MIN_LEN 1u
#define GUC_CTB_MSG_MAX_LEN 256u
#define GUC_CTB_MSG_0_FENCE (0xffff << 16)
#define GUC_CTB_MSG_0_FORMAT (0xf << 12)
#define GUC_CTB_FORMAT_HXG 0u
#define GUC_CTB_MSG_0_RESERVED (0xf << 8)
#define GUC_CTB_MSG_0_NUM_DWORDS (0xff << 0)

/**
* DOC: CTB HXG Message
*
* +---+-------+--------------------------------------------------------------+
* | | Bits | Description |
* +===+=======+==============================================================+
* | 0 | 31:16 | FENCE |
* | +-------+--------------------------------------------------------------+
* | | 15:12 | FORMAT = GUC_CTB_FORMAT_HXG_ |
* | +-------+--------------------------------------------------------------+
* | | 11:8 | RESERVED = MBZ |
* | +-------+--------------------------------------------------------------+
* | | 7:0 | NUM_DWORDS = length (in dwords) of the embedded HXG message |
* +---+-------+--------------------------------------------------------------+
* | 1 | 31:0 | +--------------------------------------------------------+ |
* +---+-------+ | | |
* |...| | | Embedded `HXG Message`_ | |
* +---+-------+ | | |
* | n | 31:0 | +--------------------------------------------------------+ |
* +---+-------+--------------------------------------------------------------+
*/

#define GUC_CTB_HXG_MSG_MIN_LEN (GUC_CTB_MSG_MIN_LEN + GUC_HXG_MSG_MIN_LEN)
#define GUC_CTB_HXG_MSG_MAX_LEN GUC_CTB_MSG_MAX_LEN

/**
* DOC: CTB based communication
Expand Down Expand Up @@ -60,28 +164,6 @@
* - **flags**, holds various bits to control message handling
*/

/*
* Describes single command transport buffer.
* Used by both guc-master and clients.
*/
struct guc_ct_buffer_desc {
u32 addr; /* gfx address */
u64 host_private; /* host private data */
u32 size; /* size in bytes */
u32 head; /* offset updated by GuC*/
u32 tail; /* offset updated by owner */
u32 is_in_error; /* error indicator */
u32 reserved1;
u32 reserved2;
u32 owner; /* id of the channel owner */
u32 owner_sub_id; /* owner-defined field for extra tracking */
u32 reserved[5];
} __packed;

/* Type of command transport buffer */
#define INTEL_GUC_CT_BUFFER_TYPE_SEND 0x0u
#define INTEL_GUC_CT_BUFFER_TYPE_RECV 0x1u

/*
* Definition of the command transport message header (DW0)
*
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65 changes: 31 additions & 34 deletions drivers/gpu/drm/i915/gt/uc/abi/guc_communication_mmio_abi.h
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#define _ABI_GUC_COMMUNICATION_MMIO_ABI_H

/**
* DOC: MMIO based communication
* DOC: GuC MMIO based communication
*
* The MMIO based communication between Host and GuC uses software scratch
* registers, where first register holds data treated as message header,
* and other registers are used to hold message payload.
* The MMIO based communication between Host and GuC relies on special
* hardware registers which format could be defined by the software
* (so called scratch registers).
*
* For Gen9+, GuC uses software scratch registers 0xC180-0xC1B8,
* but no H2G command takes more than 8 parameters and the GuC FW
* itself uses an 8-element array to store the H2G message.
* Each MMIO based message, both Host to GuC (H2G) and GuC to Host (G2H)
* messages, which maximum length depends on number of available scratch
* registers, is directly written into those scratch registers.
*
* +-----------+---------+---------+---------+
* | MMIO[0] | MMIO[1] | ... | MMIO[n] |
* +-----------+---------+---------+---------+
* | header | optional payload |
* +======+====+=========+=========+=========+
* | 31:28|type| | | |
* +------+----+ | | |
* | 27:16|data| | | |
* +------+----+ | | |
* | 15:0|code| | | |
* +------+----+---------+---------+---------+
* For Gen9+, there are 16 software scratch registers 0xC180-0xC1B8,
* but no H2G command takes more than 4 parameters and the GuC firmware
* itself uses an 4-element array to store the H2G message.
*
* The message header consists of:
* For Gen11+, there are additional 4 registers 0x190240-0x19024C, which
* are, regardless on lower count, preferred over legacy ones.
*
* - **type**, indicates message type
* - **code**, indicates message code, is specific for **type**
* - **data**, indicates message data, optional, depends on **code**
*
* The following message **types** are supported:
*
* - **REQUEST**, indicates Host-to-GuC request, requested GuC action code
* must be priovided in **code** field. Optional action specific parameters
* can be provided in remaining payload registers or **data** field.
*
* - **RESPONSE**, indicates GuC-to-Host response from earlier GuC request,
* action response status will be provided in **code** field. Optional
* response data can be returned in remaining payload registers or **data**
* field.
* The MMIO based communication is mainly used during driver initialization
* phase to setup the `CTB based communication`_ that will be used afterwards.
*/

#define GUC_MAX_MMIO_MSG_LEN 8
#define GUC_MAX_MMIO_MSG_LEN 4

/**
* DOC: MMIO HXG Message
*
* Format of the MMIO messages follows definitions of `HXG Message`_.
*
* +---+-------+--------------------------------------------------------------+
* | | Bits | Description |
* +===+=======+==============================================================+
* | 0 | 31:0 | +--------------------------------------------------------+ |
* +---+-------+ | | |
* |...| | | Embedded `HXG Message`_ | |
* +---+-------+ | | |
* | n | 31:0 | +--------------------------------------------------------+ |
* +---+-------+--------------------------------------------------------------+
*/

#endif /* _ABI_GUC_COMMUNICATION_MMIO_ABI_H */
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