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ARM: tegra: fix register address of slink controller
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Fix typo on register address of slink3 controller where register
address is wrongly set as 0x7000d480 but it is 0x7000d800.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Laxman Dewangan authored and Arnd Bergmann committed Mar 22, 2013
1 parent a8d03eb commit 57471c8
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Showing 2 changed files with 2 additions and 2 deletions.
2 changes: 1 addition & 1 deletion arch/arm/boot/dts/tegra20.dtsi
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Expand Up @@ -385,7 +385,7 @@

spi@7000d800 {
compatible = "nvidia,tegra20-slink";
reg = <0x7000d480 0x200>;
reg = <0x7000d800 0x200>;
interrupts = <0 83 0x04>;
nvidia,dma-request-selector = <&apbdma 17>;
#address-cells = <1>;
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2 changes: 1 addition & 1 deletion arch/arm/boot/dts/tegra30.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -372,7 +372,7 @@

spi@7000d800 {
compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
reg = <0x7000d480 0x200>;
reg = <0x7000d800 0x200>;
interrupts = <0 83 0x04>;
nvidia,dma-request-selector = <&apbdma 17>;
#address-cells = <1>;
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