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x86/tdx: Detect running as a TDX guest in early boot
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In preparation of extending cc_platform_has() API to support TDX guest,
use CPUID instruction to detect support for TDX guests in the early
boot code (via tdx_early_init()). Since copy_bootdata() is the first
user of cc_platform_has() API, detect the TDX guest status before it.

Define a synthetic feature flag (X86_FEATURE_TDX_GUEST) and set this
bit in a valid TDX guest platform.

Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/20220405232939.73860-2-kirill.shutemov@linux.intel.com
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Kuppuswamy Sathyanarayanan authored and Dave Hansen committed Apr 7, 2022
1 parent 3123109 commit 59bd54a
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Showing 8 changed files with 72 additions and 1 deletion.
12 changes: 12 additions & 0 deletions arch/x86/Kconfig
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Expand Up @@ -878,6 +878,18 @@ config ACRN_GUEST
IOT with small footprint and real-time features. More details can be
found in https://projectacrn.org/.

config INTEL_TDX_GUEST
bool "Intel TDX (Trust Domain Extensions) - Guest Support"
depends on X86_64 && CPU_SUP_INTEL
depends on X86_X2APIC
help
Support running as a guest under Intel TDX. Without this support,
the guest kernel can not boot or run under TDX.
TDX includes memory encryption and integrity capabilities
which protect the confidentiality and integrity of guest
memory contents and CPU state. TDX guests are protected from
some attacks from the VMM.

endif #HYPERVISOR_GUEST

source "arch/x86/Kconfig.cpu"
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2 changes: 2 additions & 0 deletions arch/x86/coco/Makefile
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Expand Up @@ -4,3 +4,5 @@ KASAN_SANITIZE_core.o := n
CFLAGS_core.o += -fno-stack-protector

obj-y += core.o

obj-$(CONFIG_INTEL_TDX_GUEST) += tdx/
3 changes: 3 additions & 0 deletions arch/x86/coco/tdx/Makefile
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@@ -0,0 +1,3 @@
# SPDX-License-Identifier: GPL-2.0

obj-y += tdx.o
22 changes: 22 additions & 0 deletions arch/x86/coco/tdx/tdx.c
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@@ -0,0 +1,22 @@
// SPDX-License-Identifier: GPL-2.0
/* Copyright (C) 2021-2022 Intel Corporation */

#undef pr_fmt
#define pr_fmt(fmt) "tdx: " fmt

#include <linux/cpufeature.h>
#include <asm/tdx.h>

void __init tdx_early_init(void)
{
u32 eax, sig[3];

cpuid_count(TDX_CPUID_LEAF_ID, 0, &eax, &sig[0], &sig[2], &sig[1]);

if (memcmp(TDX_IDENT, sig, sizeof(sig)))
return;

setup_force_cpu_cap(X86_FEATURE_TDX_GUEST);

pr_info("Guest detected\n");
}
1 change: 1 addition & 0 deletions arch/x86/include/asm/cpufeatures.h
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Expand Up @@ -238,6 +238,7 @@
#define X86_FEATURE_VMW_VMMCALL ( 8*32+19) /* "" VMware prefers VMMCALL hypercall instruction */
#define X86_FEATURE_PVUNLOCK ( 8*32+20) /* "" PV unlock function */
#define X86_FEATURE_VCPUPREEMPT ( 8*32+21) /* "" PV vcpu_is_preempted function */
#define X86_FEATURE_TDX_GUEST ( 8*32+22) /* Intel Trust Domain Extensions Guest */

/* Intel-defined CPU features, CPUID level 0x00000007:0 (EBX), word 9 */
#define X86_FEATURE_FSGSBASE ( 9*32+ 0) /* RDFSBASE, WRFSBASE, RDGSBASE, WRGSBASE instructions*/
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8 changes: 7 additions & 1 deletion arch/x86/include/asm/disabled-features.h
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Expand Up @@ -68,6 +68,12 @@
# define DISABLE_SGX (1 << (X86_FEATURE_SGX & 31))
#endif

#ifdef CONFIG_INTEL_TDX_GUEST
# define DISABLE_TDX_GUEST 0
#else
# define DISABLE_TDX_GUEST (1 << (X86_FEATURE_TDX_GUEST & 31))
#endif

/*
* Make sure to add features to the correct mask
*/
Expand All @@ -79,7 +85,7 @@
#define DISABLED_MASK5 0
#define DISABLED_MASK6 0
#define DISABLED_MASK7 (DISABLE_PTI)
#define DISABLED_MASK8 0
#define DISABLED_MASK8 (DISABLE_TDX_GUEST)
#define DISABLED_MASK9 (DISABLE_SMAP|DISABLE_SGX)
#define DISABLED_MASK10 0
#define DISABLED_MASK11 0
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21 changes: 21 additions & 0 deletions arch/x86/include/asm/tdx.h
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@@ -0,0 +1,21 @@
/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright (C) 2021-2022 Intel Corporation */
#ifndef _ASM_X86_TDX_H
#define _ASM_X86_TDX_H

#include <linux/init.h>

#define TDX_CPUID_LEAF_ID 0x21
#define TDX_IDENT "IntelTDX "

#ifdef CONFIG_INTEL_TDX_GUEST

void __init tdx_early_init(void);

#else

static inline void tdx_early_init(void) { };

#endif /* CONFIG_INTEL_TDX_GUEST */

#endif /* _ASM_X86_TDX_H */
4 changes: 4 additions & 0 deletions arch/x86/kernel/head64.c
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Expand Up @@ -40,6 +40,7 @@
#include <asm/extable.h>
#include <asm/trapnr.h>
#include <asm/sev.h>
#include <asm/tdx.h>

/*
* Manage page tables very early on.
Expand Down Expand Up @@ -514,6 +515,9 @@ asmlinkage __visible void __init x86_64_start_kernel(char * real_mode_data)

idt_setup_early_handler();

/* Needed before cc_platform_has() can be used for TDX */
tdx_early_init();

copy_bootdata(__va(real_mode_data));

/*
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