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Merge tag 'tty-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/…
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Pull tty / serial driver updates from Greg KH:
 "Here is the big set of tty and serial driver changes for 6.0-rc1.

  It was delayed from last week as I wanted to make sure the last commit
  here got some good testing in linux-next and elsewhere as it seemed to
  show up only late in testing for some reason.

  Nothing major here, just lots of cleanups from Jiri and Ilpo to make
  the tty core cleaner (Jiri) and the rs485 code simpler to use (Ilpo).

  Also included in here is the obligatory n_gsm updates from Daniel
  Starke and lots of tiny driver updates and minor fixes and tweaks for
  other smaller serial drivers.

  All of these have been in linux-next for a while with no reported
  problems"

* tag 'tty-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (186 commits)
  tty: serial: qcom-geni-serial: Fix %lu -> %u in print statements
  tty: amiserial: Fix comment typo
  tty: serial: document uart_get_console()
  tty: serial: serial_core, reformat kernel-doc for functions
  Documentation: serial: link uart_ops properly
  Documentation: serial: move GPIO kernel-doc to the functions
  Documentation: serial: dedup kernel-doc for uart functions
  Documentation: serial: move uart_ops documentation to the struct
  dt-bindings: serial: snps-dw-apb-uart: Document Rockchip RV1126
  serial: mvebu-uart: uart2 error bits clearing
  tty: serial: fsl_lpuart: correct the count of break characters
  serial: stm32: make info structs static to avoid sparse warnings
  serial: fsl_lpuart: zero out parity bit in CS7 mode
  tty: serial: qcom-geni-serial: Fix get_clk_div_rate() which otherwise could return a sub-optimal clock rate.
  serial: 8250_bcm2835aux: Add missing clk_disable_unprepare()
  tty: vt: initialize unicode screen buffer
  serial: remove VR41XX serial driver
  serial: 8250: lpc18xx: Remove redundant sanity check for RS485 flags
  serial: 8250_dwlib: remove redundant sanity check for RS485 flags
  dt_bindings: rs485: Correct delay values
  ...
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Linus Torvalds committed Aug 8, 2022
2 parents 1daf117 + 0fec518 commit 607ca0f
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1 change: 1 addition & 0 deletions Documentation/devicetree/bindings/serial/8250.yaml
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Expand Up @@ -62,6 +62,7 @@ properties:
- const: mrvl,pxa-uart
- const: nuvoton,wpcm450-uart
- const: nuvoton,npcm750-uart
- const: nuvoton,npcm845-uart
- const: nvidia,tegra20-uart
- const: nxp,lpc3220-uart
- items:
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120 changes: 120 additions & 0 deletions Documentation/devicetree/bindings/serial/mediatek,uart.yaml
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@@ -0,0 +1,120 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/serial/mediatek,uart.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: MediaTek Universal Asynchronous Receiver/Transmitter (UART)

maintainers:
- Matthias Brugger <matthias.bgg@gmail.com>

allOf:
- $ref: serial.yaml#

description: |
The MediaTek UART is based on the basic 8250 UART and compatible
with 16550A, with enhancements for high speed baud rates and
support for DMA.
properties:
compatible:
oneOf:
- const: mediatek,mt6577-uart
- items:
- enum:
- mediatek,mt2701-uart
- mediatek,mt2712-uart
- mediatek,mt6580-uart
- mediatek,mt6582-uart
- mediatek,mt6589-uart
- mediatek,mt6755-uart
- mediatek,mt6765-uart
- mediatek,mt6779-uart
- mediatek,mt6795-uart
- mediatek,mt6797-uart
- mediatek,mt7622-uart
- mediatek,mt7623-uart
- mediatek,mt7629-uart
- mediatek,mt7986-uart
- mediatek,mt8127-uart
- mediatek,mt8135-uart
- mediatek,mt8173-uart
- mediatek,mt8183-uart
- mediatek,mt8186-uart
- mediatek,mt8192-uart
- mediatek,mt8195-uart
- mediatek,mt8516-uart
- const: mediatek,mt6577-uart

reg:
description: The base address of the UART register bank
maxItems: 1

clocks:
minItems: 1
items:
- description: The clock the baudrate is derived from
- description: The bus clock for register accesses

clock-names:
minItems: 1
items:
- const: baud
- const: bus

dmas:
items:
- description: phandle to TX DMA
- description: phandle to RX DMA

dma-names:
items:
- const: tx
- const: rx

interrupts:
minItems: 1
maxItems: 2

interrupt-names:
description:
The UART interrupt and optionally the RX in-band wakeup interrupt.
minItems: 1
items:
- const: uart
- const: wakeup

pinctrl-0: true
pinctrl-1: true

pinctrl-names:
minItems: 1
items:
- const: default
- const: sleep

required:
- compatible
- reg
- clocks
- interrupts

unevaluatedProperties: false

examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
serial@11006000 {
compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart";
reg = <0x11006000 0x400>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 52 IRQ_TYPE_EDGE_FALLING>;
interrupt-names = "uart", "wakeup";
clocks = <&uart_clk>, <&bus_clk>;
clock-names = "baud", "bus";
pinctrl-0 = <&uart_pin>;
pinctrl-1 = <&uart_pin_sleep>;
pinctrl-names = "default", "sleep";
};
59 changes: 0 additions & 59 deletions Documentation/devicetree/bindings/serial/mtk-uart.txt

This file was deleted.

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Expand Up @@ -57,6 +57,7 @@ properties:
- items:
- enum:
- renesas,hscif-r8a779a0 # R-Car V3U
- renesas,hscif-r8a779f0 # R-Car S4-8
- renesas,hscif-r8a779g0 # R-Car V4H
- const: renesas,rcar-gen4-hscif # R-Car Gen4
- const: renesas,hscif # generic HSCIF compatible UART
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4 changes: 2 additions & 2 deletions Documentation/devicetree/bindings/serial/rs485.yaml
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Expand Up @@ -22,12 +22,12 @@ properties:
- description: Delay between rts signal and beginning of data sent in
milliseconds. It corresponds to the delay before sending data.
default: 0
maximum: 1000
maximum: 100
- description: Delay between end of data sent and rts signal in milliseconds.
It corresponds to the delay after sending data and actual release
of the line.
default: 0
maximum: 1000
maximum: 100

rs485-rts-active-low:
description: drive RTS low when sending (default is high).
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Expand Up @@ -33,7 +33,9 @@ properties:
- rockchip,rk3368-uart
- rockchip,rk3399-uart
- rockchip,rk3568-uart
- rockchip,rk3588-uart
- rockchip,rv1108-uart
- rockchip,rv1126-uart
- const: snps,dw-apb-uart
- items:
- enum:
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