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arm64: dts: fvp/juno: Fix serial node names
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The UARTs for all Arm Ltd. boards were using "uart" as their node name
stub.

Replace that with the required "serial" string, to comply with the PL011
DT binding.

Link: https://lore.kernel.org/r/20200513103016.130417-14-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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Andre Przywara authored and Sudeep Holla committed May 18, 2020
1 parent edfac96 commit 608f1b6
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Showing 4 changed files with 13 additions and 13 deletions.
8 changes: 4 additions & 4 deletions arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
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Expand Up @@ -316,31 +316,31 @@
clock-names = "KMIREFCLK", "apb_pclk";
};

v2m_serial0: uart@90000 {
v2m_serial0: serial@90000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x090000 0x1000>;
interrupts = <5>;
clocks = <&v2m_oscclk2>, <&smbclk>;
clock-names = "uartclk", "apb_pclk";
};

v2m_serial1: uart@a0000 {
v2m_serial1: serial@a0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0a0000 0x1000>;
interrupts = <6>;
clocks = <&v2m_oscclk2>, <&smbclk>;
clock-names = "uartclk", "apb_pclk";
};

v2m_serial2: uart@b0000 {
v2m_serial2: serial@b0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0b0000 0x1000>;
interrupts = <7>;
clocks = <&v2m_oscclk2>, <&smbclk>;
clock-names = "uartclk", "apb_pclk";
};

v2m_serial3: uart@c0000 {
v2m_serial3: serial@c0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0c0000 0x1000>;
interrupts = <8>;
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8 changes: 4 additions & 4 deletions arch/arm64/boot/dts/arm/foundation-v8.dtsi
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Expand Up @@ -189,31 +189,31 @@
reg = <0x010000 0x1000>;
};

v2m_serial0: uart@90000 {
v2m_serial0: serial@90000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x090000 0x1000>;
interrupts = <5>;
clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
clock-names = "uartclk", "apb_pclk";
};

v2m_serial1: uart@a0000 {
v2m_serial1: serial@a0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0a0000 0x1000>;
interrupts = <6>;
clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
clock-names = "uartclk", "apb_pclk";
};

v2m_serial2: uart@b0000 {
v2m_serial2: serial@b0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0b0000 0x1000>;
interrupts = <7>;
clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
clock-names = "uartclk", "apb_pclk";
};

v2m_serial3: uart@c0000 {
v2m_serial3: serial@c0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0c0000 0x1000>;
interrupts = <8>;
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2 changes: 1 addition & 1 deletion arch/arm64/boot/dts/arm/juno-base.dtsi
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Expand Up @@ -729,7 +729,7 @@
};
};

soc_uart0: uart@7ff80000 {
soc_uart0: serial@7ff80000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0x7ff80000 0x0 0x1000>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
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8 changes: 4 additions & 4 deletions arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -158,31 +158,31 @@
clock-names = "KMIREFCLK", "apb_pclk";
};

v2m_serial0: uart@90000 {
v2m_serial0: serial@90000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x090000 0x1000>;
interrupts = <5>;
clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
clock-names = "uartclk", "apb_pclk";
};

v2m_serial1: uart@a0000 {
v2m_serial1: serial@a0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0a0000 0x1000>;
interrupts = <6>;
clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
clock-names = "uartclk", "apb_pclk";
};

v2m_serial2: uart@b0000 {
v2m_serial2: serial@b0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0b0000 0x1000>;
interrupts = <7>;
clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
clock-names = "uartclk", "apb_pclk";
};

v2m_serial3: uart@c0000 {
v2m_serial3: serial@c0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0c0000 0x1000>;
interrupts = <8>;
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