drm/radeon/tn: disable PG when changing UVD clocks

Causes hangs for some people. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
mariux64 · Jul 3, 2013 · 62fa44b · 62fa44b
1 parent 2b90edd
commit 62fa44b
Showing 1 changed file with 8 additions and 0 deletions.
diff --git a/drivers/gpu/drm/radeon/trinity_dpm.c b/drivers/gpu/drm/radeon/trinity_dpm.c
@@ -921,6 +921,10 @@ static void trinity_setup_uvd_clocks(struct radeon_device *rdev,
 {
 	struct trinity_power_info *pi = trinity_get_pi(rdev);
 
+	if (pi->enable_gfx_power_gating) {
+		trinity_gfx_powergating_enable(rdev, false);
+	}
+
 	if (pi->uvd_dpm) {
 		if (trinity_uvd_clocks_zero(new_rps) &&
 		    !trinity_uvd_clocks_zero(old_rps)) {
@@ -946,6 +950,10 @@ static void trinity_setup_uvd_clocks(struct radeon_device *rdev,
 
 		radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk);
 	}
+
+	if (pi->enable_gfx_power_gating) {
+		trinity_gfx_powergating_enable(rdev, true);
+	}
 }
 
 static void trinity_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev,