Skip to content

Commit

Permalink
spi: mt65xx: add PM QoS support
Browse files Browse the repository at this point in the history
Enable Quality of Service(QoS) support to speed up interrupt service
routine handle. Sometimes, a gic interrupt will be generated after
SPI transmission, but at this time the CPU is in an idle state and the
processing handler will be very slow. It takes time to exit the idle state
and then become active. This will cause the SPI handler to execute slowly
and cause SPI transfer timeouts.

Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
Link: https://patch.msgid.link/20250304024045.7788-1-leilk.liu@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
  • Loading branch information
Leilk Liu authored and Mark Brown committed Mar 11, 2025
1 parent 02a838b commit 632556d
Showing 1 changed file with 17 additions and 0 deletions.
17 changes: 17 additions & 0 deletions drivers/spi/spi-mt65xx.c
Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,7 @@
#include <linux/spi/spi.h>
#include <linux/spi/spi-mem.h>
#include <linux/dma-mapping.h>
#include <linux/pm_qos.h>

#define SPI_CFG0_REG 0x0000
#define SPI_CFG1_REG 0x0004
Expand Down Expand Up @@ -147,6 +148,7 @@ struct mtk_spi_compatible {
* @tx_sgl_len: Size of TX DMA transfer
* @rx_sgl_len: Size of RX DMA transfer
* @dev_comp: Device data structure
* @qos_request: QoS request
* @spi_clk_hz: Current SPI clock in Hz
* @spimem_done: SPI-MEM operation completion
* @use_spimem: Enables SPI-MEM
Expand All @@ -166,6 +168,7 @@ struct mtk_spi {
struct scatterlist *tx_sgl, *rx_sgl;
u32 tx_sgl_len, rx_sgl_len;
const struct mtk_spi_compatible *dev_comp;
struct pm_qos_request qos_request;
u32 spi_clk_hz;
struct completion spimem_done;
bool use_spimem;
Expand Down Expand Up @@ -356,6 +359,7 @@ static int mtk_spi_hw_init(struct spi_controller *host,
struct mtk_chip_config *chip_config = spi->controller_data;
struct mtk_spi *mdata = spi_controller_get_devdata(host);

cpu_latency_qos_update_request(&mdata->qos_request, 500);
cpha = spi->mode & SPI_CPHA ? 1 : 0;
cpol = spi->mode & SPI_CPOL ? 1 : 0;

Expand Down Expand Up @@ -459,6 +463,15 @@ static int mtk_spi_prepare_message(struct spi_controller *host,
return mtk_spi_hw_init(host, msg->spi);
}

static int mtk_spi_unprepare_message(struct spi_controller *host,
struct spi_message *message)
{
struct mtk_spi *mdata = spi_controller_get_devdata(host);

cpu_latency_qos_update_request(&mdata->qos_request, PM_QOS_DEFAULT_VALUE);
return 0;
}

static void mtk_spi_set_cs(struct spi_device *spi, bool enable)
{
u32 reg_val;
Expand Down Expand Up @@ -1143,6 +1156,7 @@ static int mtk_spi_probe(struct platform_device *pdev)

host->set_cs = mtk_spi_set_cs;
host->prepare_message = mtk_spi_prepare_message;
host->unprepare_message = mtk_spi_unprepare_message;
host->transfer_one = mtk_spi_transfer_one;
host->can_dma = mtk_spi_can_dma;
host->setup = mtk_spi_setup;
Expand Down Expand Up @@ -1249,6 +1263,8 @@ static int mtk_spi_probe(struct platform_device *pdev)
clk_disable_unprepare(mdata->spi_hclk);
}

cpu_latency_qos_add_request(&mdata->qos_request, PM_QOS_DEFAULT_VALUE);

if (mdata->dev_comp->need_pad_sel) {
if (mdata->pad_num != host->num_chipselect)
return dev_err_probe(dev, -EINVAL,
Expand Down Expand Up @@ -1292,6 +1308,7 @@ static void mtk_spi_remove(struct platform_device *pdev)
struct mtk_spi *mdata = spi_controller_get_devdata(host);
int ret;

cpu_latency_qos_remove_request(&mdata->qos_request);
if (mdata->use_spimem && !completion_done(&mdata->spimem_done))
complete(&mdata->spimem_done);

Expand Down

0 comments on commit 632556d

Please sign in to comment.