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msm: timer: compensate for timer shift in msm_read_timer_count
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Some msm targets have timers whose lower bits are unreliable. So, we
present our timers as lower frequency than they actually are, and ignore
the bottom 5 bits on such targets. This compensation was erroneously
removed from the msm_read_timer_count function, so restore it.

This was broken by 94790ec "msm: timer: SMP timer support for msm".

Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
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Jeff Ohlstein authored and David Brown committed Jun 17, 2011
1 parent ebf30dc commit 650f156
Showing 1 changed file with 5 additions and 1 deletion.
6 changes: 5 additions & 1 deletion arch/arm/mach-msm/timer.c
Original file line number Diff line number Diff line change
Expand Up @@ -102,7 +102,11 @@ static cycle_t msm_read_timer_count(struct clocksource *cs)
{
struct msm_clock *clk = container_of(cs, struct msm_clock, clocksource);

return readl(clk->global_counter);
/*
* Shift timer count down by a constant due to unreliable lower bits
* on some targets.
*/
return readl(clk->global_counter) >> clk->shift;
}

static struct msm_clock *clockevent_to_clock(struct clock_event_device *evt)
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