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wifi: rtw89: coex: add init_info H2C command format version 7
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To avoid using bit fields for H2C command, rearrange the structure.
And also patch the corresponding code for the using of this structure.
No logic changes for existing chips.

Signed-off-by: Ching-Te Ku <ku920601@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://msgid.link/20240229074514.219276-4-pkshih@realtek.com
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Ching-Te Ku authored and Kalle Valo committed Mar 5, 2024
1 parent d569f85 commit 652c964
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Showing 11 changed files with 586 additions and 164 deletions.
158 changes: 106 additions & 52 deletions drivers/net/wireless/realtek/rtw89/coex.c
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18 changes: 18 additions & 0 deletions drivers/net/wireless/realtek/rtw89/coex.h
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Original file line number Diff line number Diff line change
Expand Up @@ -153,6 +153,10 @@ enum btc_lps_state {

#define BTC_REG_NOTFOUND 0xff

#define R_BTC_ZB_COEX_TBL_0 0xE328
#define R_BTC_ZB_COEX_TBL_1 0xE32c
#define R_BTC_ZB_BREAK_TBL 0xE350

enum btc_ant_div_pos {
BTC_ANT_DIV_MAIN = 0,
BTC_ANT_DIV_AUX = 1,
Expand Down Expand Up @@ -181,6 +185,20 @@ enum btc_btgctrl_type {
BTC_BTGCTRL_BB_GNT_NOTFOUND,
};

enum btc_wa_type {
BTC_WA_5G_HI_CH_RX = BIT(0),
BTC_WA_NULL_AP = BIT(1),
BTC_WA_HFP_ZB = BIT(2), /* HFP PTA req bit4 define issue */
};

enum btc_3cx_type {
BTC_3CX_NONE = 0,
BTC_3CX_BT2 = BIT(0),
BTC_3CX_ZB = BIT(1),
BTC_3CX_LTE = BIT(2),
BTC_3CX_MAX,
};

void rtw89_btc_ntfy_poweron(struct rtw89_dev *rtwdev);
void rtw89_btc_ntfy_poweroff(struct rtw89_dev *rtwdev);
void rtw89_btc_ntfy_init(struct rtw89_dev *rtwdev, u8 mode);
Expand Down
67 changes: 65 additions & 2 deletions drivers/net/wireless/realtek/rtw89/core.h
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Original file line number Diff line number Diff line change
Expand Up @@ -1277,6 +1277,18 @@ struct rtw89_btc_ant_info {
u8 stream_cnt: 4;
};

struct rtw89_btc_ant_info_v7 {
u8 type; /* shared, dedicated(non-shared) */
u8 num; /* antenna count */
u8 isolation;
u8 single_pos;/* wifi 1ss-1ant at 0:S0 or 1:S1 */

u8 diversity; /* only for wifi use 1-antenna */
u8 btg_pos; /* btg-circuit at 0:S0/1:S1/others:all */
u8 stream_cnt; /* spatial_stream count */
u8 rsvd;
} __packed;

enum rtw89_tfc_dir {
RTW89_TFC_UL,
RTW89_TFC_DL,
Expand Down Expand Up @@ -1671,6 +1683,16 @@ struct rtw89_btc_dm_emap {
u32 wl_e2g_hang: 1;
u32 wl_ver_mismatch: 1;
u32 bt_ver_mismatch: 1;
u32 rfe_type0: 1;
u32 h2c_buffer_over: 1;
u32 bt_tx_hang: 1; /* for SNR too low bug, BT has no Tx req*/
u32 wl_no_sta_ntfy: 1;

u32 h2c_bmap_mismatch: 1;
u32 c2h_bmap_mismatch: 1;
u32 h2c_struct_invalid: 1;
u32 c2h_struct_invalid: 1;
u32 h2c_c2h_buffer_mismatch: 1;
};

union rtw89_btc_dm_error_map {
Expand Down Expand Up @@ -1736,6 +1758,25 @@ struct rtw89_btc_module {
u8 kt_ver_adie;
};

struct rtw89_btc_module_v7 {
u8 rfe_type;
u8 kt_ver;
u8 bt_solo;
u8 bt_pos; /* wl-end view: get from efuse, must compare bt.btg_type*/

u8 switch_type; /* WL/BT switch type: 0: internal, 1: external */
u8 wa_type; /* WA type: 0:none, 1: 51B 5G_Hi-Ch_Rx */
u8 kt_ver_adie;
u8 rsvd;

struct rtw89_btc_ant_info_v7 ant;
} __packed;

union rtw89_btc_module_info {
struct rtw89_btc_module md;
struct rtw89_btc_module_v7 md_v7;
};

#define RTW89_BTC_DM_MAXSTEP 30
#define RTW89_BTC_DM_CNT_MAX (RTW89_BTC_DM_MAXSTEP * 8)

Expand All @@ -1758,6 +1799,25 @@ struct rtw89_btc_init_info {
u16 rsvd;
};

struct rtw89_btc_init_info_v7 {
u8 wl_guard_ch;
u8 wl_only;
u8 wl_init_ok;
u8 rsvd3;

u8 cx_other;
u8 bt_only;
u8 pta_mode;
u8 pta_direction;

struct rtw89_btc_module_v7 module;
} __packed;

union rtw89_btc_init_info_u {
struct rtw89_btc_init_info init;
struct rtw89_btc_init_info_v7 init_v7;
};

struct rtw89_btc_wl_tx_limit_para {
u16 enable;
u32 tx_time; /* unit: us */
Expand Down Expand Up @@ -2496,7 +2556,7 @@ struct rtw89_btc_dm {
struct rtw89_btc_fbtc_tdma tdma;
struct rtw89_btc_fbtc_tdma tdma_now;
struct rtw89_mac_ax_coex_gnt gnt;
struct rtw89_btc_init_info init_info; /* pass to wl_fw if offload */
union rtw89_btc_init_info_u init_info; /* pass to wl_fw if offload */
struct rtw89_btc_rf_trx_para rf_trx_para;
struct rtw89_btc_wl_tx_limit_para wl_tx_limit;
struct rtw89_btc_dm_step dm_step;
Expand Down Expand Up @@ -2717,6 +2777,7 @@ struct rtw89_btc_ver {
u8 fwlrole;
u8 frptmap;
u8 fcxctrl;
u8 fcxinit;

u16 info_buf;
u8 max_role_num;
Expand All @@ -2730,7 +2791,7 @@ struct rtw89_btc {
struct rtw89_btc_cx cx;
struct rtw89_btc_dm dm;
struct rtw89_btc_ctrl ctrl;
struct rtw89_btc_module mdinfo;
union rtw89_btc_module_info mdinfo;
struct rtw89_btc_btf_fwinfo fwinfo;
struct rtw89_btc_dbg dbg;

Expand All @@ -2742,6 +2803,8 @@ struct rtw89_btc {
u32 bt_req_len;

u8 policy[RTW89_BTC_POLICY_MAXLEN];
u8 ant_type;
u8 btg_pos;
u16 policy_len;
u16 policy_type;
bool bt_req_en;
Expand Down
42 changes: 41 additions & 1 deletion drivers/net/wireless/realtek/rtw89/fw.c
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Original file line number Diff line number Diff line change
Expand Up @@ -3757,7 +3757,7 @@ int rtw89_fw_h2c_cxdrv_init(struct rtw89_dev *rtwdev)
{
struct rtw89_btc *btc = &rtwdev->btc;
struct rtw89_btc_dm *dm = &btc->dm;
struct rtw89_btc_init_info *init_info = &dm->init_info;
struct rtw89_btc_init_info *init_info = &dm->init_info.init;
struct rtw89_btc_module *module = &init_info->module;
struct rtw89_btc_ant_info *ant = &module->ant;
struct rtw89_h2c_cxinit *h2c;
Expand Down Expand Up @@ -3820,6 +3820,46 @@ int rtw89_fw_h2c_cxdrv_init(struct rtw89_dev *rtwdev)
return ret;
}

int rtw89_fw_h2c_cxdrv_init_v7(struct rtw89_dev *rtwdev)
{
struct rtw89_btc *btc = &rtwdev->btc;
struct rtw89_btc_dm *dm = &btc->dm;
struct rtw89_btc_init_info_v7 *init_info = &dm->init_info.init_v7;
struct rtw89_h2c_cxinit_v7 *h2c;
u32 len = sizeof(*h2c);
struct sk_buff *skb;
int ret;

skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
if (!skb) {
rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_init_v7\n");
return -ENOMEM;
}
skb_put(skb, len);
h2c = (struct rtw89_h2c_cxinit_v7 *)skb->data;

h2c->hdr.type = CXDRVINFO_INIT;
h2c->hdr.len = len - H2C_LEN_CXDRVHDR;
h2c->init = *init_info;

rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
H2C_CAT_OUTSRC, BTFC_SET,
SET_DRV_INFO, 0, 0,
len);

ret = rtw89_h2c_tx(rtwdev, skb, false);
if (ret) {
rtw89_err(rtwdev, "failed to send h2c\n");
goto fail;
}

return 0;
fail:
dev_kfree_skb_any(skb);

return ret;
}

#define PORT_DATA_OFFSET 4
#define H2C_LEN_CXDRVINFO_ROLE_DBCC_LEN 12
#define H2C_LEN_CXDRVINFO_ROLE_SIZE(max_role_num) \
Expand Down
6 changes: 6 additions & 0 deletions drivers/net/wireless/realtek/rtw89/fw.h
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Original file line number Diff line number Diff line change
Expand Up @@ -2400,6 +2400,11 @@ struct rtw89_h2c_cxinit {
#define RTW89_H2C_CXINIT_INFO_CX_OTHER BIT(3)
#define RTW89_H2C_CXINIT_INFO_BT_ONLY BIT(4)

struct rtw89_h2c_cxinit_v7 {
struct rtw89_h2c_cxhdr hdr;
struct rtw89_btc_init_info_v7 init;
} __packed;

static inline void RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(void *cmd, u8 val)
{
u8p_replace_bits((u8 *)(cmd) + 2, val, GENMASK(7, 0));
Expand Down Expand Up @@ -4532,6 +4537,7 @@ int rtw89_fw_h2c_rssi_offload(struct rtw89_dev *rtwdev,
int rtw89_fw_h2c_tp_offload(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif);
int rtw89_fw_h2c_ra(struct rtw89_dev *rtwdev, struct rtw89_ra_info *ra, bool csi);
int rtw89_fw_h2c_cxdrv_init(struct rtw89_dev *rtwdev);
int rtw89_fw_h2c_cxdrv_init_v7(struct rtw89_dev *rtwdev);
int rtw89_fw_h2c_cxdrv_role(struct rtw89_dev *rtwdev);
int rtw89_fw_h2c_cxdrv_role_v1(struct rtw89_dev *rtwdev);
int rtw89_fw_h2c_cxdrv_role_v2(struct rtw89_dev *rtwdev);
Expand Down
7 changes: 7 additions & 0 deletions drivers/net/wireless/realtek/rtw89/reg.h
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Original file line number Diff line number Diff line change
Expand Up @@ -3510,8 +3510,13 @@
#define B_AX_PTA_EDCCA_EN BIT(0)

#define R_BTC_COEX_WL_REQ 0xDA24
#define R_BTC_COEX_WL_REQ_BE 0xE324
#define B_BTC_TX_NULL_HI BIT(23)
#define B_BTC_TX_BCN_HI BIT(22)
#define B_BTC_TX_TRI_HI BIT(17)
#define B_BTC_RSP_ACK_HI BIT(10)
#define B_BTC_PRI_MASK_TX_TIME GENMASK(4, 3)
#define B_BTC_PRI_MASK_RX_TIME_V1 GENMASK(2, 1)

#define R_BTC_BREAK_TABLE 0xDA2C
#define BTC_BREAK_PARAM 0xf0ffffff
Expand Down Expand Up @@ -5932,6 +5937,8 @@
#define B_BE_MACID_ACQ_GRP0_CLR_P BIT(2)
#define B_BE_R_MACID_ACQ_CHK_EN BIT(0)

#define R_BE_BT_BREAK_TABLE 0x0E344

#define R_BE_GNT_SW_CTRL 0x0E348
#define B_BE_WL_ACT2_VAL BIT(25)
#define B_BE_WL_ACT2_SWCTRL BIT(24)
Expand Down
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