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Merge branch 'renesas/dt-du' into next/dt
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This is a base for the DT updates, merged through the arm-soc
cleanup branch.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann committed Nov 19, 2014
2 parents 17908a1 + 0ee56d4 commit 67ec55b
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Showing 52 changed files with 370 additions and 343 deletions.
83 changes: 83 additions & 0 deletions arch/arm/boot/dts/r8a7779-marzen.dts
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Expand Up @@ -69,6 +69,78 @@
gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;
};
};

vga-encoder {
compatible = "adi,adv7123";

ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
vga_enc_in: endpoint {
remote-endpoint = <&du_out_rgb0>;
};
};
port@1 {
reg = <1>;
vga_enc_out: endpoint {
remote-endpoint = <&vga_in>;
};
};
};
};

vga {
compatible = "vga-connector";

port {
vga_in: endpoint {
remote-endpoint = <&vga_enc_out>;
};
};
};

lvds-encoder {
compatible = "thine,thc63lvdm83d";

ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
lvds_enc_in: endpoint {
remote-endpoint = <&du_out_rgb1>;
};
};
port@1 {
reg = <1>;
lvds_connector: endpoint {
};
};
};
};
};

&du {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
status = "okay";

ports {
port@0 {
endpoint {
remote-endpoint = <&vga_enc_in>;
};
};
port@1 {
endpoint {
remote-endpoint = <&lvds_enc_in>;
};
};
};
};

&irqpin0 {
Expand All @@ -84,6 +156,17 @@
};

&pfc {
du_pins: du {
du0 {
renesas,groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0";
renesas,function = "du0";
};
du1 {
renesas,groups = "du1_rgb666", "du1_sync_1", "du1_clk_out";
renesas,function = "du1";
};
};

lan0_pins: lan0 {
intc {
renesas,groups = "intc_irq1_b";
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24 changes: 24 additions & 0 deletions arch/arm/boot/dts/r8a7779.dtsi
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Expand Up @@ -379,6 +379,30 @@
status = "disabled";
};

du: display@fff80000 {
compatible = "renesas,du-r8a7779";
reg = <0 0xfff80000 0 0x40000>;
interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp1_clks R8A7779_CLK_DU>;
status = "disabled";

ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
du_out_rgb0: endpoint {
};
};
port@1 {
reg = <1>;
du_out_rgb1: endpoint {
};
};
};
};

clocks {
#address-cells = <1>;
#size-cells = <1>;
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53 changes: 50 additions & 3 deletions arch/arm/boot/dts/r8a7790-lager.dts
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Expand Up @@ -145,16 +145,63 @@
states = <3300000 1
1800000 0>;
};

vga-encoder {
compatible = "adi,adv7123";

ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
adv7123_in: endpoint {
remote-endpoint = <&du_out_rgb>;
};
};
port@1 {
reg = <1>;
adv7123_out: endpoint {
remote-endpoint = <&vga_in>;
};
};
};
};

vga {
compatible = "vga-connector";

port {
vga_in: endpoint {
remote-endpoint = <&adv7123_out>;
};
};
};
};

&du {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
status = "okay";

ports {
port@0 {
endpoint {
remote-endpoint = <&adv7123_in>;
};
};
port@2 {
lvds_connector: endpoint {
};
};
};
};

&extal_clk {
clock-frequency = <20000000>;
};

&pfc {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";

du_pins: du {
renesas,groups = "du_rgb666", "du_sync_1", "du_clk_out_0";
renesas,function = "du";
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90 changes: 90 additions & 0 deletions arch/arm/boot/dts/r8a7790.dtsi
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Expand Up @@ -600,6 +600,96 @@
status = "disabled";
};

vsp1@fe920000 {
compatible = "renesas,vsp1";
reg = <0 0xfe920000 0 0x8000>;
interrupts = <0 266 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>;

renesas,has-sru;
renesas,#rpf = <5>;
renesas,#uds = <1>;
renesas,#wpf = <4>;
};

vsp1@fe928000 {
compatible = "renesas,vsp1";
reg = <0 0xfe928000 0 0x8000>;
interrupts = <0 267 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>;

renesas,has-lut;
renesas,has-sru;
renesas,#rpf = <5>;
renesas,#uds = <3>;
renesas,#wpf = <4>;
};

vsp1@fe930000 {
compatible = "renesas,vsp1";
reg = <0 0xfe930000 0 0x8000>;
interrupts = <0 246 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>;

renesas,has-lif;
renesas,has-lut;
renesas,#rpf = <4>;
renesas,#uds = <1>;
renesas,#wpf = <4>;
};

vsp1@fe938000 {
compatible = "renesas,vsp1";
reg = <0 0xfe938000 0 0x8000>;
interrupts = <0 247 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>;

renesas,has-lif;
renesas,has-lut;
renesas,#rpf = <4>;
renesas,#uds = <1>;
renesas,#wpf = <4>;
};

du: display@feb00000 {
compatible = "renesas,du-r8a7790";
reg = <0 0xfeb00000 0 0x70000>,
<0 0xfeb90000 0 0x1c>,
<0 0xfeb94000 0 0x1c>;
reg-names = "du", "lvds.0", "lvds.1";
interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>,
<0 268 IRQ_TYPE_LEVEL_HIGH>,
<0 269 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp7_clks R8A7790_CLK_DU0>,
<&mstp7_clks R8A7790_CLK_DU1>,
<&mstp7_clks R8A7790_CLK_DU2>,
<&mstp7_clks R8A7790_CLK_LVDS0>,
<&mstp7_clks R8A7790_CLK_LVDS1>;
clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
status = "disabled";

ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
du_out_rgb: endpoint {
};
};
port@1 {
reg = <1>;
du_out_lvds0: endpoint {
};
};
port@2 {
reg = <2>;
du_out_lvds1: endpoint {
};
};
};
};

clocks {
#address-cells = <2>;
#size-cells = <2>;
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16 changes: 13 additions & 3 deletions arch/arm/boot/dts/r8a7791-koelsch.dts
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Expand Up @@ -212,14 +212,24 @@
};
};

&du {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
status = "okay";

ports {
port@1 {
lvds_connector: endpoint {
};
};
};
};

&extal_clk {
clock-frequency = <20000000>;
};

&pfc {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";

i2c2_pins: i2c2 {
renesas,groups = "i2c2";
renesas,function = "i2c2";
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69 changes: 69 additions & 0 deletions arch/arm/boot/dts/r8a7791.dtsi
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Expand Up @@ -637,6 +637,75 @@
status = "disabled";
};

vsp1@fe928000 {
compatible = "renesas,vsp1";
reg = <0 0xfe928000 0 0x8000>;
interrupts = <0 267 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp1_clks R8A7791_CLK_VSP1_S>;

renesas,has-lut;
renesas,has-sru;
renesas,#rpf = <5>;
renesas,#uds = <3>;
renesas,#wpf = <4>;
};

vsp1@fe930000 {
compatible = "renesas,vsp1";
reg = <0 0xfe930000 0 0x8000>;
interrupts = <0 246 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU0>;

renesas,has-lif;
renesas,has-lut;
renesas,#rpf = <4>;
renesas,#uds = <1>;
renesas,#wpf = <4>;
};

vsp1@fe938000 {
compatible = "renesas,vsp1";
reg = <0 0xfe938000 0 0x8000>;
interrupts = <0 247 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU1>;

renesas,has-lif;
renesas,has-lut;
renesas,#rpf = <4>;
renesas,#uds = <1>;
renesas,#wpf = <4>;
};

du: display@feb00000 {
compatible = "renesas,du-r8a7791";
reg = <0 0xfeb00000 0 0x40000>,
<0 0xfeb90000 0 0x1c>;
reg-names = "du", "lvds.0";
interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>,
<0 268 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp7_clks R8A7791_CLK_DU0>,
<&mstp7_clks R8A7791_CLK_DU1>,
<&mstp7_clks R8A7791_CLK_LVDS0>;
clock-names = "du.0", "du.1", "lvds.0";
status = "disabled";

ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
du_out_rgb: endpoint {
};
};
port@1 {
reg = <1>;
du_out_lvds0: endpoint {
};
};
};
};

clocks {
#address-cells = <2>;
#size-cells = <2>;
Expand Down
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