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Merge branch 'net-aquantia-minor-bug-fixes-after-static-analysis'
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Igor Russkikh says:

====================
net: aquantia: minor bug fixes after static analysis

This patchset fixes minor errors and warnings found by smatch and kasan.

Extra patch is to replace AQ_HW_WAIT_FOR with readx_poll_timeout
to improve readability.

V2:
use readx_poll
resubmitted to net-next since the changeset became quite big.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller committed Mar 2, 2019
2 parents 699be71 + 0b926d4 commit 6ae8762
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Showing 11 changed files with 197 additions and 83 deletions.
2 changes: 1 addition & 1 deletion drivers/net/ethernet/aquantia/atlantic/aq_ethtool.c
Original file line number Diff line number Diff line change
Expand Up @@ -138,7 +138,7 @@ static void aq_ethtool_get_strings(struct net_device *ndev,
u8 *p = data;

if (stringset == ETH_SS_STATS) {
memcpy(p, *aq_ethtool_stat_names,
memcpy(p, aq_ethtool_stat_names,
sizeof(aq_ethtool_stat_names));
p = p + sizeof(aq_ethtool_stat_names);
for (i = 0; i < cfg->vecs; i++) {
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14 changes: 2 additions & 12 deletions drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h
Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,8 @@
#ifndef AQ_HW_UTILS_H
#define AQ_HW_UTILS_H

#include <linux/iopoll.h>

#include "aq_common.h"

#ifndef HIDWORD
Expand All @@ -23,18 +25,6 @@

#define AQ_HW_SLEEP(_US_) mdelay(_US_)

#define AQ_HW_WAIT_FOR(_B_, _US_, _N_) \
do { \
unsigned int AQ_HW_WAIT_FOR_i; \
for (AQ_HW_WAIT_FOR_i = _N_; (!(_B_)) && (AQ_HW_WAIT_FOR_i);\
--AQ_HW_WAIT_FOR_i) {\
udelay(_US_); \
} \
if (!AQ_HW_WAIT_FOR_i) {\
err = -ETIME; \
} \
} while (0)

#define aq_pr_err(...) pr_err(AQ_CFG_DRV_NAME ": " __VA_ARGS__)
#define aq_pr_trace(...) pr_info(AQ_CFG_DRV_NAME ": " __VA_ARGS__)

Expand Down
2 changes: 1 addition & 1 deletion drivers/net/ethernet/aquantia/atlantic/aq_nic.c
Original file line number Diff line number Diff line change
Expand Up @@ -986,4 +986,4 @@ void aq_nic_shutdown(struct aq_nic_s *self)

err_exit:
rtnl_unlock();
}
}
2 changes: 2 additions & 0 deletions drivers/net/ethernet/aquantia/atlantic/aq_pci_func.c
Original file line number Diff line number Diff line change
Expand Up @@ -170,6 +170,8 @@ void aq_pci_func_free_irqs(struct aq_nic_s *self)
for (i = 32U; i--;) {
if (!((1U << i) & self->msix_entry_mask))
continue;
if (i >= AQ_CFG_VECS_MAX)
continue;

if (pdev->msix_enabled)
irq_set_affinity_hint(pci_irq_vector(pdev, i), NULL);
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25 changes: 17 additions & 8 deletions drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c
Original file line number Diff line number Diff line change
Expand Up @@ -85,6 +85,7 @@ const struct aq_hw_caps_s hw_atl_a0_caps_aqc109 = {
static int hw_atl_a0_hw_reset(struct aq_hw_s *self)
{
int err = 0;
u32 val;

hw_atl_glb_glb_reg_res_dis_set(self, 1U);
hw_atl_pci_pci_reg_res_dis_set(self, 0U);
Expand All @@ -95,15 +96,19 @@ static int hw_atl_a0_hw_reset(struct aq_hw_s *self)
hw_atl_glb_soft_res_set(self, 1);

/* check 10 times by 1ms */
AQ_HW_WAIT_FOR(hw_atl_glb_soft_res_get(self) == 0, 1000U, 10U);
err = readx_poll_timeout_atomic(hw_atl_glb_soft_res_get,
self, val, val == 0,
1000U, 10000U);
if (err < 0)
goto err_exit;

hw_atl_itr_irq_reg_res_dis_set(self, 0U);
hw_atl_itr_res_irq_set(self, 1U);

/* check 10 times by 1ms */
AQ_HW_WAIT_FOR(hw_atl_itr_res_irq_get(self) == 0, 1000U, 10U);
err = readx_poll_timeout_atomic(hw_atl_itr_res_irq_get,
self, val, val == 0,
1000U, 10000U);
if (err < 0)
goto err_exit;

Expand Down Expand Up @@ -181,15 +186,17 @@ static int hw_atl_a0_hw_rss_hash_set(struct aq_hw_s *self,
int err = 0;
unsigned int i = 0U;
unsigned int addr = 0U;
u32 val;

for (i = 10, addr = 0U; i--; ++addr) {
u32 key_data = cfg->is_rss ?
__swab32(rss_params->hash_secret_key[i]) : 0U;
hw_atl_rpf_rss_key_wr_data_set(self, key_data);
hw_atl_rpf_rss_key_addr_set(self, addr);
hw_atl_rpf_rss_key_wr_en_set(self, 1U);
AQ_HW_WAIT_FOR(hw_atl_rpf_rss_key_wr_en_get(self) == 0,
1000U, 10U);
err = readx_poll_timeout_atomic(hw_atl_rpf_rss_key_wr_en_get,
self, val, val == 0,
1000U, 10000U);
if (err < 0)
goto err_exit;
}
Expand All @@ -207,8 +214,9 @@ static int hw_atl_a0_hw_rss_set(struct aq_hw_s *self,
u32 i = 0U;
u32 num_rss_queues = max(1U, self->aq_nic_cfg->num_rss_queues);
int err = 0;
u16 bitary[(HW_ATL_A0_RSS_REDIRECTION_MAX *
HW_ATL_A0_RSS_REDIRECTION_BITS / 16U)];
u16 bitary[1 + (HW_ATL_A0_RSS_REDIRECTION_MAX *
HW_ATL_A0_RSS_REDIRECTION_BITS / 16U)];
u32 val;

memset(bitary, 0, sizeof(bitary));

Expand All @@ -222,8 +230,9 @@ static int hw_atl_a0_hw_rss_set(struct aq_hw_s *self,
hw_atl_rpf_rss_redir_tbl_wr_data_set(self, bitary[i]);
hw_atl_rpf_rss_redir_tbl_addr_set(self, i);
hw_atl_rpf_rss_redir_wr_en_set(self, 1U);
AQ_HW_WAIT_FOR(hw_atl_rpf_rss_redir_wr_en_get(self) == 0,
1000U, 10U);
err = readx_poll_timeout_atomic(hw_atl_rpf_rss_redir_wr_en_get,
self, val, val == 0,
1000U, 10000U);
if (err < 0)
goto err_exit;
}
Expand Down
16 changes: 10 additions & 6 deletions drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c
Original file line number Diff line number Diff line change
Expand Up @@ -173,15 +173,17 @@ static int hw_atl_b0_hw_rss_hash_set(struct aq_hw_s *self,
int err = 0;
unsigned int i = 0U;
unsigned int addr = 0U;
u32 val;

for (i = 10, addr = 0U; i--; ++addr) {
u32 key_data = cfg->is_rss ?
__swab32(rss_params->hash_secret_key[i]) : 0U;
hw_atl_rpf_rss_key_wr_data_set(self, key_data);
hw_atl_rpf_rss_key_addr_set(self, addr);
hw_atl_rpf_rss_key_wr_en_set(self, 1U);
AQ_HW_WAIT_FOR(hw_atl_rpf_rss_key_wr_en_get(self) == 0,
1000U, 10U);
err = readx_poll_timeout_atomic(hw_atl_rpf_rss_key_wr_en_get,
self, val, val == 0,
1000U, 10000U);
if (err < 0)
goto err_exit;
}
Expand All @@ -199,8 +201,9 @@ static int hw_atl_b0_hw_rss_set(struct aq_hw_s *self,
u32 i = 0U;
u32 num_rss_queues = max(1U, self->aq_nic_cfg->num_rss_queues);
int err = 0;
u16 bitary[(HW_ATL_B0_RSS_REDIRECTION_MAX *
HW_ATL_B0_RSS_REDIRECTION_BITS / 16U)];
u16 bitary[1 + (HW_ATL_B0_RSS_REDIRECTION_MAX *
HW_ATL_B0_RSS_REDIRECTION_BITS / 16U)];
u32 val;

memset(bitary, 0, sizeof(bitary));

Expand All @@ -214,8 +217,9 @@ static int hw_atl_b0_hw_rss_set(struct aq_hw_s *self,
hw_atl_rpf_rss_redir_tbl_wr_data_set(self, bitary[i]);
hw_atl_rpf_rss_redir_tbl_addr_set(self, i);
hw_atl_rpf_rss_redir_wr_en_set(self, 1U);
AQ_HW_WAIT_FOR(hw_atl_rpf_rss_redir_wr_en_get(self) == 0,
1000U, 10U);
err = readx_poll_timeout_atomic(hw_atl_rpf_rss_redir_wr_en_get,
self, val, val == 0,
1000U, 10000U);
if (err < 0)
goto err_exit;
}
Expand Down
21 changes: 21 additions & 0 deletions drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.c
Original file line number Diff line number Diff line change
Expand Up @@ -1585,3 +1585,24 @@ void hw_atl_rpfl3l4_ipv6_dest_addr_set(struct aq_hw_s *aq_hw, u8 location,
HW_ATL_RPF_L3_DSTA_ADR(location + i),
ipv6_dest[i]);
}

u32 hw_atl_sem_ram_get(struct aq_hw_s *self)
{
return hw_atl_reg_glb_cpu_sem_get(self, HW_ATL_FW_SM_RAM);
}

u32 hw_atl_scrpad_get(struct aq_hw_s *aq_hw, u32 scratch_scp)
{
return aq_hw_read_reg(aq_hw,
HW_ATL_GLB_CPU_SCRATCH_SCP_ADR(scratch_scp));
}

u32 hw_atl_scrpad12_get(struct aq_hw_s *self)
{
return hw_atl_scrpad_get(self, 0xB);
}

u32 hw_atl_scrpad25_get(struct aq_hw_s *self)
{
return hw_atl_scrpad_get(self, 0x18);
}
12 changes: 12 additions & 0 deletions drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.h
Original file line number Diff line number Diff line change
Expand Up @@ -752,4 +752,16 @@ void hw_atl_rpfl3l4_ipv6_src_addr_set(struct aq_hw_s *aq_hw, u8 location,
void hw_atl_rpfl3l4_ipv6_dest_addr_set(struct aq_hw_s *aq_hw, u8 location,
u32 *ipv6_dest);

/* get global microprocessor ram semaphore */
u32 hw_atl_sem_ram_get(struct aq_hw_s *self);

/* get global microprocessor scratch pad register */
u32 hw_atl_scrpad_get(struct aq_hw_s *aq_hw, u32 scratch_scp);

/* get global microprocessor scratch pad 12 register */
u32 hw_atl_scrpad12_get(struct aq_hw_s *self);

/* get global microprocessor scratch pad 25 register */
u32 hw_atl_scrpad25_get(struct aq_hw_s *self);

#endif /* HW_ATL_LLH_H */
Original file line number Diff line number Diff line change
Expand Up @@ -2519,4 +2519,6 @@
/* Default value of bitfield l3_da0[1F:0] */
#define HW_ATL_RPF_L3_DSTA_DEFAULT 0x0

#define HW_ATL_FW_SM_RAM 0x2U

#endif /* HW_ATL_LLH_INTERNAL_H */
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