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dt-bindings: usb: dwc3: Move Amlogic G12A DWC3 Glue Bindings to YAML …
…schemas Now that we have the DT validation in place, let's convert the device tree bindings for the Amlogic G12A DWC3 Glue Bindings over to a YAML schemas, the AXG and GXL glue bindings will be converted later. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> [robh: drop maxItems on vbus-supply] Signed-off-by: Rob Herring <robh@kernel.org>
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Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | ||
# Copyright 2019 BayLibre, SAS | ||
%YAML 1.2 | ||
--- | ||
$id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#" | ||
$schema: "http://devicetree.org/meta-schemas/core.yaml#" | ||
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title: Amlogic Meson G12A DWC3 USB SoC Controller Glue | ||
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maintainers: | ||
- Neil Armstrong <narmstrong@baylibre.com> | ||
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description: | | ||
The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3 | ||
in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode | ||
only. | ||
A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY. | ||
One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP. | ||
The DWC3 Glue controls the PHY routing and power, an interrupt line is | ||
connected to the Glue to serve as OTG ID change detection. | ||
properties: | ||
compatible: | ||
enum: | ||
- amlogic,meson-g12a-usb-ctrl | ||
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ranges: true | ||
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"#address-cells": | ||
enum: [ 1, 2 ] | ||
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"#size-cells": | ||
enum: [ 1, 2 ] | ||
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clocks: | ||
minItems: 1 | ||
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resets: | ||
minItems: 1 | ||
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reg: | ||
maxItems: 1 | ||
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interrupts: | ||
maxItems: 1 | ||
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phy-names: | ||
items: | ||
- const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used | ||
- const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used | ||
- const: usb3-phy0 # USB3 PHY if USB3_0 is used | ||
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phys: | ||
minItems: 1 | ||
maxItems: 3 | ||
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dr_mode: true | ||
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power-domains: | ||
maxItems: 1 | ||
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vbus-supply: | ||
description: VBUS power supply when used in OTG switchable mode | ||
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patternProperties: | ||
"^usb@[0-9a-f]+$": | ||
type: object | ||
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additionalProperties: false | ||
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required: | ||
- compatible | ||
- "#address-cells" | ||
- "#size-cells" | ||
- ranges | ||
- clocks | ||
- resets | ||
- reg | ||
- interrupts | ||
- phy-names | ||
- phys | ||
- dr_mode | ||
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examples: | ||
- | | ||
usb: usb@ffe09000 { | ||
compatible = "amlogic,meson-g12a-usb-ctrl"; | ||
reg = <0x0 0xffe09000 0x0 0xa0>; | ||
interrupts = <16>; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
ranges; | ||
clocks = <&clkc_usb>; | ||
resets = <&reset_usb>; | ||
dr_mode = "otg"; | ||
phys = <&usb2_phy0>, <&usb2_phy1>, <&usb3_phy0>; | ||
phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0"; | ||
dwc2: usb@ff400000 { | ||
compatible = "amlogic,meson-g12a-usb", "snps,dwc2"; | ||
reg = <0xff400000 0x40000>; | ||
interrupts = <31>; | ||
clocks = <&clkc_usb1>; | ||
clock-names = "ddr"; | ||
phys = <&usb2_phy1>; | ||
dr_mode = "peripheral"; | ||
g-rx-fifo-size = <192>; | ||
g-np-tx-fifo-size = <128>; | ||
g-tx-fifo-size = <128 128 16 16 16>; | ||
}; | ||
dwc3: usb@ff500000 { | ||
compatible = "snps,dwc3"; | ||
reg = <0xff500000 0x100000>; | ||
interrupts = <30>; | ||
dr_mode = "host"; | ||
snps,dis_u2_susphy_quirk; | ||
snps,quirk-frame-length-adjustment; | ||
}; | ||
}; | ||