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MIPS: generic: Add support for Microsemi Ocelot
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Introduce support for the MIPS based Microsemi Ocelot SoCs.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Allan Nielsen <Allan.Nielsen@microsemi.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/18858/
[jhogan@kernel.org: update ocelot_defconfig specification]
Signed-off-by: James Hogan <jhogan@kernel.org>
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Alexandre Belloni authored and James Hogan committed Mar 21, 2018
1 parent 6b36d31 commit 6bce3de
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3 changes: 3 additions & 0 deletions arch/mips/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -565,6 +565,9 @@ generic_defconfig:
# now that the boards have been converted to use the generic kernel they are
# wrappers around the generic rules above.
#
legacy_defconfigs += ocelot_defconfig
ocelot_defconfig-y := 32r2el_defconfig BOARDS=ocelot

legacy_defconfigs += sead3_defconfig
sead3_defconfig-y := 32r2el_defconfig BOARDS=sead-3

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35 changes: 35 additions & 0 deletions arch/mips/configs/generic/board-ocelot.config
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@@ -0,0 +1,35 @@
# require CONFIG_CPU_MIPS32_R2=y

CONFIG_LEGACY_BOARD_OCELOT=y

CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_PLATFORM=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_UBI=y

CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y

CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_OF_PLATFORM=y

CONFIG_GPIO_SYSFS=y

CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MUX=y

CONFIG_SPI=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_DESIGNWARE=y
CONFIG_SPI_SPIDEV=y

CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_OCELOT_RESET=y

CONFIG_MAGIC_SYSRQ=y
16 changes: 16 additions & 0 deletions arch/mips/generic/Kconfig
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Expand Up @@ -27,6 +27,22 @@ config LEGACY_BOARD_SEAD3
Enable this to include support for booting on MIPS SEAD-3 FPGA-based
development boards, which boot using a legacy boot protocol.

comment "MSCC Ocelot doesn't work with SEAD3 enabled"
depends on LEGACY_BOARD_SEAD3

config LEGACY_BOARD_OCELOT
bool "Support MSCC Ocelot boards"
depends on LEGACY_BOARD_SEAD3=n
select LEGACY_BOARDS
select MSCC_OCELOT

config MSCC_OCELOT
bool
select GPIOLIB
select MSCC_OCELOT_IRQ
select SYS_HAS_EARLY_PRINTK
select USE_GENERIC_EARLY_PRINTK_8250

comment "FIT/UHI Boards"

config FIT_IMAGE_FDT_BOSTON
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1 change: 1 addition & 0 deletions arch/mips/generic/Makefile
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Expand Up @@ -14,5 +14,6 @@ obj-y += proc.o

obj-$(CONFIG_YAMON_DT_SHIM) += yamon-dt.o
obj-$(CONFIG_LEGACY_BOARD_SEAD3) += board-sead3.o
obj-$(CONFIG_LEGACY_BOARD_OCELOT) += board-ocelot.o
obj-$(CONFIG_KEXEC) += kexec.o
obj-$(CONFIG_VIRT_BOARD_RANCHU) += board-ranchu.o
78 changes: 78 additions & 0 deletions arch/mips/generic/board-ocelot.c
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@@ -0,0 +1,78 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Microsemi MIPS SoC support
*
* Copyright (c) 2017 Microsemi Corporation
*/
#include <asm/machine.h>
#include <asm/prom.h>

#define DEVCPU_GCB_CHIP_REGS_CHIP_ID 0x71070000
#define CHIP_ID_PART_ID GENMASK(27, 12)

#define OCELOT_PART_ID (0x7514 << 12)

#define UART_UART 0x70100000

static __init bool ocelot_detect(void)
{
u32 rev;
int idx;

/* Look for the TLB entry set up by redboot before trying to use it */
write_c0_entryhi(DEVCPU_GCB_CHIP_REGS_CHIP_ID);
mtc0_tlbw_hazard();
tlb_probe();
tlb_probe_hazard();
idx = read_c0_index();
if (idx < 0)
return 0;

/* A TLB entry exists, lets assume its usable and check the CHIP ID */
rev = __raw_readl((void __iomem *)DEVCPU_GCB_CHIP_REGS_CHIP_ID);

if ((rev & CHIP_ID_PART_ID) != OCELOT_PART_ID)
return 0;

/* Copy command line from bootloader early for Initrd detection */
if (fw_arg0 < 10 && (fw_arg1 & 0xFFF00000) == 0x80000000) {
unsigned int prom_argc = fw_arg0;
const char **prom_argv = (const char **)fw_arg1;

if (prom_argc > 1 && strlen(prom_argv[1]) > 0)
/* ignore all built-in args if any f/w args given */
strcpy(arcs_cmdline, prom_argv[1]);
}

return 1;
}

static void __init ocelot_earlyprintk_init(void)
{
void __iomem *uart_base;

uart_base = ioremap_nocache(UART_UART, 0x20);
setup_8250_early_printk_port((unsigned long)uart_base, 2, 50000);
}

static void __init ocelot_late_init(void)
{
ocelot_earlyprintk_init();
}

static __init const void *ocelot_fixup_fdt(const void *fdt,
const void *match_data)
{
/* This has to be done so late because ioremap needs to work */
late_time_init = ocelot_late_init;

return fdt;
}

extern char __dtb_ocelot_pcb123_begin[];

MIPS_MACHINE(ocelot) = {
.fdt = __dtb_ocelot_pcb123_begin,
.fixup_fdt = ocelot_fixup_fdt,
.detect = ocelot_detect,
};

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