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Merge tag 'asoc-3.8p1' of git://git.kernel.org/pub/scm/linux/kernel/g…
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…it/broonie/sound into for-next

ASoC: More updates for v3.8

Nothing terribly exciting here, just small localised changes.

As well as fixes there are a couple of Cirrus changes and one devm_
change which were in prior to the merge window but got missed from the
original pull to Takashi.
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Takashi Iwai committed Dec 17, 2012
2 parents df68f10 + 8246b5b commit 6be7f53
Showing 213 changed files with 1,680 additions and 1,761 deletions.
8 changes: 5 additions & 3 deletions Makefile
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
VERSION = 3
PATCHLEVEL = 7
SUBLEVEL = 0
EXTRAVERSION = -rc7
EXTRAVERSION =
NAME = Terrified Chipmunk

# *DOCUMENTATION*
@@ -1321,10 +1321,12 @@ kernelversion:

# Clear a bunch of variables before executing the submake
tools/: FORCE
$(Q)$(MAKE) LDFLAGS= MAKEFLAGS= -C $(src)/tools/
$(Q)mkdir -p $(objtree)/tools
$(Q)$(MAKE) LDFLAGS= MAKEFLAGS= O=$(objtree) subdir=tools -C $(src)/tools/

tools/%: FORCE
$(Q)$(MAKE) LDFLAGS= MAKEFLAGS= -C $(src)/tools/ $*
$(Q)mkdir -p $(objtree)/tools
$(Q)$(MAKE) LDFLAGS= MAKEFLAGS= O=$(objtree) subdir=tools -C $(src)/tools/ $*

# Single targets
# ---------------------------------------------------------------------------
1 change: 1 addition & 0 deletions arch/arm/Kconfig
Original file line number Diff line number Diff line change
@@ -547,6 +547,7 @@ config ARCH_KIRKWOOD
select CPU_FEROCEON
select GENERIC_CLOCKEVENTS
select PCI
select PCI_QUIRKS
select PLAT_ORION_LEGACY
help
Support for the following Marvell Kirkwood series SoCs:
14 changes: 13 additions & 1 deletion arch/arm/boot/compressed/head.S
Original file line number Diff line number Diff line change
@@ -652,6 +652,15 @@ __setup_mmu: sub r3, r4, #16384 @ Page directory size
mov pc, lr
ENDPROC(__setup_mmu)

@ Enable unaligned access on v6, to allow better code generation
@ for the decompressor C code:
__armv6_mmu_cache_on:
mrc p15, 0, r0, c1, c0, 0 @ read SCTLR
bic r0, r0, #2 @ A (no unaligned access fault)
orr r0, r0, #1 << 22 @ U (v6 unaligned access model)
mcr p15, 0, r0, c1, c0, 0 @ write SCTLR
b __armv4_mmu_cache_on

__arm926ejs_mmu_cache_on:
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
mov r0, #4 @ put dcache in WT mode
@@ -694,6 +703,9 @@ __armv7_mmu_cache_on:
bic r0, r0, #1 << 28 @ clear SCTLR.TRE
orr r0, r0, #0x5000 @ I-cache enable, RR cache replacement
orr r0, r0, #0x003c @ write buffer
bic r0, r0, #2 @ A (no unaligned access fault)
orr r0, r0, #1 << 22 @ U (v6 unaligned access model)
@ (needed for ARM1176)
#ifdef CONFIG_MMU
#ifdef CONFIG_CPU_ENDIAN_BE8
orr r0, r0, #1 << 25 @ big-endian page tables
@@ -914,7 +926,7 @@ proc_types:

.word 0x0007b000 @ ARMv6
.word 0x000ff000
W(b) __armv4_mmu_cache_on
W(b) __armv6_mmu_cache_on
W(b) __armv4_mmu_cache_off
W(b) __armv6_mmu_cache_flush

2 changes: 1 addition & 1 deletion arch/arm/boot/dts/at91sam9260.dtsi
Original file line number Diff line number Diff line change
@@ -217,7 +217,7 @@
compatible = "atmel,at91rm9200-ssc";
reg = <0xfffbc000 0x4000>;
interrupts = <14 4 5>;
status = "disable";
status = "disabled";
};

adc0: adc@fffe0000 {
4 changes: 2 additions & 2 deletions arch/arm/boot/dts/at91sam9263.dtsi
Original file line number Diff line number Diff line change
@@ -179,14 +179,14 @@
compatible = "atmel,at91rm9200-ssc";
reg = <0xfff98000 0x4000>;
interrupts = <16 4 5>;
status = "disable";
status = "disabled";
};

ssc1: ssc@fff9c000 {
compatible = "atmel,at91rm9200-ssc";
reg = <0xfff9c000 0x4000>;
interrupts = <17 4 5>;
status = "disable";
status = "disabled";
};

macb0: ethernet@fffbc000 {
4 changes: 2 additions & 2 deletions arch/arm/boot/dts/at91sam9g45.dtsi
Original file line number Diff line number Diff line change
@@ -232,14 +232,14 @@
compatible = "atmel,at91sam9g45-ssc";
reg = <0xfff9c000 0x4000>;
interrupts = <16 4 5>;
status = "disable";
status = "disabled";
};

ssc1: ssc@fffa0000 {
compatible = "atmel,at91sam9g45-ssc";
reg = <0xfffa0000 0x4000>;
interrupts = <17 4 5>;
status = "disable";
status = "disabled";
};

adc0: adc@fffb0000 {
2 changes: 1 addition & 1 deletion arch/arm/boot/dts/at91sam9x5.dtsi
Original file line number Diff line number Diff line change
@@ -92,7 +92,7 @@
compatible = "atmel,at91sam9g45-ssc";
reg = <0xf0010000 0x4000>;
interrupts = <28 4 5>;
status = "disable";
status = "disabled";
};

tcb0: timer@f8008000 {
2 changes: 1 addition & 1 deletion arch/arm/common/timer-sp.c
Original file line number Diff line number Diff line change
@@ -162,7 +162,6 @@ static struct clock_event_device sp804_clockevent = {
.set_mode = sp804_set_mode,
.set_next_event = sp804_set_next_event,
.rating = 300,
.cpumask = cpu_all_mask,
};

static struct irqaction sp804_timer_irq = {
@@ -185,6 +184,7 @@ void __init sp804_clockevents_init(void __iomem *base, unsigned int irq,
clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ);
evt->name = name;
evt->irq = irq;
evt->cpumask = cpu_possible_mask;

setup_irq(irq, &sp804_timer_irq);
clockevents_config_and_register(evt, rate, 0xf, 0xffffffff);
2 changes: 1 addition & 1 deletion arch/arm/mach-dove/include/mach/pm.h
Original file line number Diff line number Diff line change
@@ -63,7 +63,7 @@ static inline int pmu_to_irq(int pin)

static inline int irq_to_pmu(int irq)
{
if (IRQ_DOVE_PMU_START < irq && irq < NR_IRQS)
if (IRQ_DOVE_PMU_START <= irq && irq < NR_IRQS)
return irq - IRQ_DOVE_PMU_START;

return -EINVAL;
14 changes: 13 additions & 1 deletion arch/arm/mach-dove/irq.c
Original file line number Diff line number Diff line change
@@ -46,8 +46,20 @@ static void pmu_irq_ack(struct irq_data *d)
int pin = irq_to_pmu(d->irq);
u32 u;

/*
* The PMU mask register is not RW0C: it is RW. This means that
* the bits take whatever value is written to them; if you write
* a '1', you will set the interrupt.
*
* Unfortunately this means there is NO race free way to clear
* these interrupts.
*
* So, let's structure the code so that the window is as small as
* possible.
*/
u = ~(1 << (pin & 31));
writel(u, PMU_INTERRUPT_CAUSE);
u &= readl_relaxed(PMU_INTERRUPT_CAUSE);
writel_relaxed(u, PMU_INTERRUPT_CAUSE);
}

static struct irq_chip pmu_irq_chip = {
1 change: 1 addition & 0 deletions arch/arm/mach-ixp4xx/common-pci.c
Original file line number Diff line number Diff line change
@@ -410,6 +410,7 @@ void __init ixp4xx_pci_preinit(void)
* Enable the IO window to be way up high, at 0xfffffc00
*/
local_write_config(PCI_BASE_ADDRESS_5, 4, 0xfffffc01);
local_write_config(0x40, 4, 0x000080FF); /* No TRDY time limit */
} else {
printk("PCI: IXP4xx is target - No bus scan performed\n");
}
13 changes: 5 additions & 8 deletions arch/arm/mach-ixp4xx/common.c
Original file line number Diff line number Diff line change
@@ -67,15 +67,12 @@ static struct map_desc ixp4xx_io_desc[] __initdata = {
.pfn = __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS),
.length = IXP4XX_PCI_CFG_REGION_SIZE,
.type = MT_DEVICE
},
#ifdef CONFIG_DEBUG_LL
{ /* Debug UART mapping */
.virtual = (unsigned long)IXP4XX_DEBUG_UART_BASE_VIRT,
.pfn = __phys_to_pfn(IXP4XX_DEBUG_UART_BASE_PHYS),
.length = IXP4XX_DEBUG_UART_REGION_SIZE,
}, { /* Queue Manager */
.virtual = (unsigned long)IXP4XX_QMGR_BASE_VIRT,
.pfn = __phys_to_pfn(IXP4XX_QMGR_BASE_PHYS),
.length = IXP4XX_QMGR_REGION_SIZE,
.type = MT_DEVICE
}
#endif
},
};

void __init ixp4xx_map_io(void)
3 changes: 2 additions & 1 deletion arch/arm/mach-ixp4xx/goramo_mlr.c
Original file line number Diff line number Diff line change
@@ -15,6 +15,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/pci.h>
#include <asm/system_info.h>

#define SLOT_ETHA 0x0B /* IDSEL = AD21 */
#define SLOT_ETHB 0x0C /* IDSEL = AD20 */
@@ -329,7 +330,7 @@ static struct platform_device device_hss_tab[] = {
};


static struct platform_device *device_tab[6] __initdata = {
static struct platform_device *device_tab[7] __initdata = {
&device_flash, /* index 0 */
};

4 changes: 2 additions & 2 deletions arch/arm/mach-ixp4xx/include/mach/debug-macro.S
Original file line number Diff line number Diff line change
@@ -17,8 +17,8 @@
#else
mov \rp, #0
#endif
orr \rv, \rp, #0xff000000 @ virtual
orr \rv, \rv, #0x00b00000
orr \rv, \rp, #0xfe000000 @ virtual
orr \rv, \rv, #0x00f00000
orr \rp, \rp, #0xc8000000 @ physical
.endm

46 changes: 19 additions & 27 deletions arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
Original file line number Diff line number Diff line change
@@ -30,51 +30,43 @@
*
* 0x50000000 0x10000000 ioremap'd EXP BUS
*
* 0x6000000 0x00004000 ioremap'd QMgr
* 0xC8000000 0x00013000 0xFEF00000 On-Chip Peripherals
*
* 0xC0000000 0x00001000 0xffbff000 PCI CFG
* 0xC0000000 0x00001000 0xFEF13000 PCI CFG
*
* 0xC4000000 0x00001000 0xffbfe000 EXP CFG
* 0xC4000000 0x00001000 0xFEF14000 EXP CFG
*
* 0xC8000000 0x00013000 0xffbeb000 On-Chip Peripherals
* 0x60000000 0x00004000 0xFEF15000 QMgr
*/

/*
* Queue Manager
*/
#define IXP4XX_QMGR_BASE_PHYS (0x60000000)
#define IXP4XX_QMGR_REGION_SIZE (0x00004000)
#define IXP4XX_QMGR_BASE_PHYS 0x60000000
#define IXP4XX_QMGR_BASE_VIRT IOMEM(0xFEF15000)
#define IXP4XX_QMGR_REGION_SIZE 0x00004000

/*
* Expansion BUS Configuration registers
* Peripheral space, including debug UART. Must be section-aligned so that
* it can be used with the low-level debug code.
*/
#define IXP4XX_EXP_CFG_BASE_PHYS (0xC4000000)
#define IXP4XX_EXP_CFG_BASE_VIRT IOMEM(0xFFBFE000)
#define IXP4XX_EXP_CFG_REGION_SIZE (0x00001000)
#define IXP4XX_PERIPHERAL_BASE_PHYS 0xC8000000
#define IXP4XX_PERIPHERAL_BASE_VIRT IOMEM(0xFEF00000)
#define IXP4XX_PERIPHERAL_REGION_SIZE 0x00013000

/*
* PCI Config registers
*/
#define IXP4XX_PCI_CFG_BASE_PHYS (0xC0000000)
#define IXP4XX_PCI_CFG_BASE_VIRT IOMEM(0xFFBFF000)
#define IXP4XX_PCI_CFG_REGION_SIZE (0x00001000)

/*
* Peripheral space
*/
#define IXP4XX_PERIPHERAL_BASE_PHYS (0xC8000000)
#define IXP4XX_PERIPHERAL_BASE_VIRT IOMEM(0xFFBEB000)
#define IXP4XX_PERIPHERAL_REGION_SIZE (0x00013000)
#define IXP4XX_PCI_CFG_BASE_PHYS 0xC0000000
#define IXP4XX_PCI_CFG_BASE_VIRT IOMEM(0xFEF13000)
#define IXP4XX_PCI_CFG_REGION_SIZE 0x00001000

/*
* Debug UART
*
* This is basically a remap of UART1 into a region that is section
* aligned so that it * can be used with the low-level debug code.
* Expansion BUS Configuration registers
*/
#define IXP4XX_DEBUG_UART_BASE_PHYS (0xC8000000)
#define IXP4XX_DEBUG_UART_BASE_VIRT IOMEM(0xffb00000)
#define IXP4XX_DEBUG_UART_REGION_SIZE (0x00001000)
#define IXP4XX_EXP_CFG_BASE_PHYS 0xC4000000
#define IXP4XX_EXP_CFG_BASE_VIRT 0xFEF14000
#define IXP4XX_EXP_CFG_REGION_SIZE 0x00001000

#define IXP4XX_EXP_CS0_OFFSET 0x00
#define IXP4XX_EXP_CS1_OFFSET 0x04
12 changes: 6 additions & 6 deletions arch/arm/mach-ixp4xx/include/mach/qmgr.h
Original file line number Diff line number Diff line change
@@ -86,7 +86,7 @@ void qmgr_release_queue(unsigned int queue);

static inline void qmgr_put_entry(unsigned int queue, u32 val)
{
extern struct qmgr_regs __iomem *qmgr_regs;
struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
#if DEBUG_QMGR
BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */

@@ -99,7 +99,7 @@ static inline void qmgr_put_entry(unsigned int queue, u32 val)
static inline u32 qmgr_get_entry(unsigned int queue)
{
u32 val;
extern struct qmgr_regs __iomem *qmgr_regs;
const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
val = __raw_readl(&qmgr_regs->acc[queue][0]);
#if DEBUG_QMGR
BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
@@ -112,14 +112,14 @@ static inline u32 qmgr_get_entry(unsigned int queue)

static inline int __qmgr_get_stat1(unsigned int queue)
{
extern struct qmgr_regs __iomem *qmgr_regs;
const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
return (__raw_readl(&qmgr_regs->stat1[queue >> 3])
>> ((queue & 7) << 2)) & 0xF;
}

static inline int __qmgr_get_stat2(unsigned int queue)
{
extern struct qmgr_regs __iomem *qmgr_regs;
const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
BUG_ON(queue >= HALF_QUEUES);
return (__raw_readl(&qmgr_regs->stat2[queue >> 4])
>> ((queue & 0xF) << 1)) & 0x3;
@@ -145,7 +145,7 @@ static inline int qmgr_stat_empty(unsigned int queue)
*/
static inline int qmgr_stat_below_low_watermark(unsigned int queue)
{
extern struct qmgr_regs __iomem *qmgr_regs;
const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
if (queue >= HALF_QUEUES)
return (__raw_readl(&qmgr_regs->statne_h) >>
(queue - HALF_QUEUES)) & 0x01;
@@ -172,7 +172,7 @@ static inline int qmgr_stat_above_high_watermark(unsigned int queue)
*/
static inline int qmgr_stat_full(unsigned int queue)
{
extern struct qmgr_regs __iomem *qmgr_regs;
const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
if (queue >= HALF_QUEUES)
return (__raw_readl(&qmgr_regs->statf_h) >>
(queue - HALF_QUEUES)) & 0x01;
9 changes: 8 additions & 1 deletion arch/arm/mach-ixp4xx/ixp4xx_npe.c
Original file line number Diff line number Diff line change
@@ -116,7 +116,11 @@
/* NPE mailbox_status value for reset */
#define RESET_MBOX_STAT 0x0000F0F0

const char *npe_names[] = { "NPE-A", "NPE-B", "NPE-C" };
#define NPE_A_FIRMWARE "NPE-A"
#define NPE_B_FIRMWARE "NPE-B"
#define NPE_C_FIRMWARE "NPE-C"

const char *npe_names[] = { NPE_A_FIRMWARE, NPE_B_FIRMWARE, NPE_C_FIRMWARE };

#define print_npe(pri, npe, fmt, ...) \
printk(pri "%s: " fmt, npe_name(npe), ## __VA_ARGS__)
@@ -724,6 +728,9 @@ module_exit(npe_cleanup_module);

MODULE_AUTHOR("Krzysztof Halasa");
MODULE_LICENSE("GPL v2");
MODULE_FIRMWARE(NPE_A_FIRMWARE);
MODULE_FIRMWARE(NPE_B_FIRMWARE);
MODULE_FIRMWARE(NPE_C_FIRMWARE);

EXPORT_SYMBOL(npe_names);
EXPORT_SYMBOL(npe_running);
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