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Merge tag 'gpio-v4.19-1' of git://git.kernel.org/pub/scm/linux/kernel…
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…/git/linusw/linux-gpio

Pull GPIO updates from Linus Walleij:
 "This is the bulk of GPIO changes for the v4.19 kernel cycle.

  I don't know if anything in particular stands out. Maybe the Aspeed
  coprocessor thing from Benji: Aspeed is doing baseboard management
  chips (BMC's) for servers etc.

  These Aspeed's are ARM processors that exist inside (I guess) Intel
  servers, and they are moving forward to using mainline Linux in those.
  This is one of the pieces of the puzzle to achive that. They are doing
  OpenBMC, it's pretty cool: https://lwn.net/Articles/683320/

  Summary:

  Core changes:

   - Add a new API for explicitly naming GPIO consumers, when needed.

   - Don't let userspace set values on input lines. While we do not
     think anyone would do this crazy thing we better plug the hole
     before someone uses it and think it's a nifty feature.

   - Avoid calling chip->request() for unused GPIOs.

  New drivers/subdrivers:

   - The Mediatek MT7621 is supported which is a big win for OpenWRT and
     similar router distributions using this chip, as it seems every
     major router manufacturer on the planet has made products using
     this chip: https://wikidevi.com/wiki/MediaTek_MT7621

   - The Tegra 194 is now supported.

   - The IT87 driver now supports IT8786E and IT8718F super-IO chips.

   - Add support for Rockchip RK3328 in the syscon GPIO driver.

  Driver changes:

   - Handle the get/set_multiple() properly on MMIO chips with inverted
     direction registers. We didn't have this problem until a new chip
     appear that has get/set registers AND inverted direction bits, OK
     now we handle it.

   - A patch series making more error codes percolate upward properly
     for different errors on gpiochip_lock_as_irq().

   - Get/set multiple for the OMAP driver, accelerating these multiple
     line operations if possible.

   - A coprocessor interface for the Aspeed driver. Sometimes a few GPIO
     lines need to be grabbed by a co-processor for doing automated
     tasks, sometimes they are available as GPIO lines. By adding an
     explicit API in this driver we make it possible for the two line
     consumers to coexist. (This work was made available on the
     ib-aspeed branch, which may be appearing in other pull requests.)

   - Implemented .get_direction() and open drain in the SCH311x driver.

   - Continuing cleanup of included headers in GPIO drivers"

* tag 'gpio-v4.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (80 commits)
  gpio: it87: Add support for IT8613
  gpio: it87: add support for IT8718F Super I/O.
  gpiolib: Avoid calling chip->request() for unused gpios
  gpio: tegra: Include the right header
  gpio: mmio: Fix up inverted direction registers
  gpio: xilinx: Use the right include
  gpio: timberdale: Include the right header
  gpio: tb10x: Use the right include
  gpiolib: Fix of_node inconsistency
  gpio: vr41xx: Bail out on gpiochip_lock_as_irq() error
  gpio: uniphier: Bail out on gpiochip_lock_as_irq() error
  gpio: xgene-sb: Don't shadow error code of gpiochip_lock_as_irq()
  gpio: em: Don't shadow error code of gpiochip_lock_as_irq()
  gpio: dwapb: Don't shadow error code of gpiochip_lock_as_irq()
  gpio: bcm-kona: Don't shadow error code of gpiochip_lock_as_irq()
  gpiolib: Don't shadow error code of gpiochip_lock_as_irq()
  gpio: syscon: rockchip: add GRF GPIO support for rk3328
  gpio: omap: Add get/set_multiple() callbacks
  gpio: pxa: remove set but not used variable 'gpio_offset'
  gpio-it87: add support for IT8786E Super I/O
  ...
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Linus Torvalds committed Aug 16, 2018
2 parents c1c2ad8 + a5ec96d commit 6de4c69
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3 changes: 3 additions & 0 deletions Documentation/devicetree/bindings/gpio/fsl-imx-gpio.txt
Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,9 @@ Required properties:
4 = active high level-sensitive.
8 = active low level-sensitive.

Optional properties:
- clocks: the clock for clocking the GPIO silicon

Example:

gpio0: gpio@73f84000 {
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35 changes: 35 additions & 0 deletions Documentation/devicetree/bindings/gpio/mediatek,mt7621-gpio.txt
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@@ -0,0 +1,35 @@
Mediatek MT7621 SoC GPIO controller bindings

The IP core used inside these SoCs has 3 banks of 32 GPIOs each.
The registers of all the banks are interwoven inside one single IO range.
We load one GPIO controller instance per bank. Also the GPIO controller can receive
interrupts on any of the GPIOs, either edge or level. It then interrupts the CPU
using GIC INT12.

Required properties for the top level node:
- #gpio-cells : Should be two. The first cell is the GPIO pin number and the
second cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>.
Only the GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
- #interrupt-cells : Specifies the number of cells needed to encode an
interrupt. Should be 2. The first cell defines the interrupt number,
the second encodes the triger flags encoded as described in
Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
- compatible:
- "mediatek,mt7621-gpio" for Mediatek controllers
- reg : Physical base address and length of the controller's registers
- interrupt-parent : phandle of the parent interrupt controller.
- interrupts : Interrupt specifier for the controllers interrupt.
- interrupt-controller : Mark the device node as an interrupt controller.
- gpio-controller : Marks the device node as a GPIO controller.

Example:
gpio@600 {
#gpio-cells = <2>;
#interrupt-cells = <2>;
compatible = "mediatek,mt7621-gpio";
gpio-controller;
interrupt-controller;
reg = <0x600 0x100>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 12 IRQ_TYPE_LEVEL_HIGH>;
};
Original file line number Diff line number Diff line change
Expand Up @@ -68,6 +68,8 @@ Required properties:
One of:
- "nvidia,tegra186-gpio".
- "nvidia,tegra186-gpio-aon".
- "nvidia,tegra194-gpio".
- "nvidia,tegra194-gpio-aon".
- reg-names
Array of strings.
Contains a list of names for the register spaces described by the reg
Expand All @@ -91,6 +93,8 @@ Required properties:
depending on compatible value:
- "nvidia,tegra186-gpio": 6 entries.
- "nvidia,tegra186-gpio-aon": 1 entry.
- "nvidia,tegra194-gpio": 6 entries.
- "nvidia,tegra194-gpio-aon": 1 entry.
- gpio-controller
Boolean.
Marks the device node as a GPIO controller/provider.
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Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,7 @@ Required Properties:
- "renesas,gpio-r8a7796": for R8A7796 (R-Car M3-W) compatible GPIO controller.
- "renesas,gpio-r8a77965": for R8A77965 (R-Car M3-N) compatible GPIO controller.
- "renesas,gpio-r8a77970": for R8A77970 (R-Car V3M) compatible GPIO controller.
- "renesas,gpio-r8a77980": for R8A77980 (R-Car V3H) compatible GPIO controller.
- "renesas,gpio-r8a77990": for R8A77990 (R-Car E3) compatible GPIO controller.
- "renesas,gpio-r8a77995": for R8A77995 (R-Car D3) compatible GPIO controller.
- "renesas,rcar-gen1-gpio": for a generic R-Car Gen1 GPIO controller.
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Original file line number Diff line number Diff line change
@@ -0,0 +1,32 @@
Rockchip RK3328 GRF (General Register Files) GPIO controller.

In Rockchip RK3328, the output only GPIO_MUTE pin, originally for codec mute
control, can also be used for general purpose. It is manipulated by the
GRF_SOC_CON10 register in GRF. Aside from the GPIO_MUTE pin, the HDMI pins can
also be set in the same way.

Currently this GPIO controller only supports the mute pin. If needed in the
future, the HDMI pins support can also be added.

Required properties:
- compatible: Should contain "rockchip,rk3328-grf-gpio".
- gpio-controller: Marks the device node as a gpio controller.
- #gpio-cells: Should be 2. The first cell is the pin number and
the second cell is used to specify the gpio polarity:
0 = Active high,
1 = Active low.

Example:

grf: syscon@ff100000 {
compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd";

grf_gpio: grf-gpio {
compatible = "rockchip,rk3328-grf-gpio";
gpio-controller;
#gpio-cells = <2>;
};
};

Note: The grf_gpio node should be declared as the child of the GRF (General
Register File) node. The GPIO_MUTE pin is referred to as <&grf_gpio 0>.
12 changes: 11 additions & 1 deletion drivers/gpio/Kconfig
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Expand Up @@ -359,6 +359,15 @@ config GPIO_MPC8XXX
Say Y here if you're going to use hardware that connects to the
MPC512x/831x/834x/837x/8572/8610/QorIQ GPIOs.

config GPIO_MT7621
bool "Mediatek MT7621 GPIO Support"
depends on SOC_MT7620 || SOC_MT7621 || COMPILE_TEST
depends on OF_GPIO
select GPIO_GENERIC
select GPIOLIB_IRQCHIP
help
Say yes here to support the Mediatek MT7621 SoC GPIO device

config GPIO_MVEBU
def_bool y
depends on PLAT_ORION || ARCH_MVEBU
Expand Down Expand Up @@ -684,7 +693,8 @@ config GPIO_IT87
Say yes here to support GPIO functionality of IT87xx Super I/O chips.

This driver is tested with ITE IT8728 and IT8732 Super I/O chips, and
supports the IT8761E, IT8620E and IT8628E Super I/O chip as well.
supports the IT8761E, IT8613, IT8620E, and IT8628E Super I/O chips as
well.

To compile this driver as a module, choose M here: the module will
be called gpio_it87
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1 change: 1 addition & 0 deletions drivers/gpio/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -88,6 +88,7 @@ obj-$(CONFIG_GPIO_MOCKUP) += gpio-mockup.o
obj-$(CONFIG_GPIO_MPC5200) += gpio-mpc5200.o
obj-$(CONFIG_GPIO_MPC8XXX) += gpio-mpc8xxx.o
obj-$(CONFIG_GPIO_MSIC) += gpio-msic.o
obj-$(CONFIG_GPIO_MT7621) += gpio-mt7621.o
obj-$(CONFIG_GPIO_MVEBU) += gpio-mvebu.o
obj-$(CONFIG_GPIO_MXC) += gpio-mxc.o
obj-$(CONFIG_GPIO_MXS) += gpio-mxs.o
Expand Down
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